vi32bar.c 1.43 KB
#include "cpusim.h"

#define CMEM_WORD	(*(vu32*)K0BASE)
#define UMEM_WORD	(*(vu32*)K1BASE)

#define CMEM64_WORD	(*(vu32*)PHYS_TO_K0(DDRRAM64_START))
#define UMEM64_WORD	(*(vu32*)PHYS_TO_K1(DDRRAM64_START))

#define CNONMEM_WORD	(*(vu32*)PHYS_TO_K0(PI_BUFFER_BASE_REG))
#define UNONMEM_WORD	(*(vu32*)PHYS_TO_K1(PI_BUFFER_BASE_REG))

#define WIDTH 320
#define HEIGHT 240
#define FRAME_BUFFER 0x1000
#define WORDS_PER_LINE ((WIDTH*4) / 4)

unsigned int bars[8] = {0xbfbfbf00, // grey
                            0xbfbf0000, // yellow
                            0x00bfbf00, // cyan
                            0x00bf0000, // green
                            0xbf00bf00, // magenta
                            0xbf000000, // red
                            0x0000bf00, // blue
                            0x00000000  // black
};
int
main() {
    int i, j, k;
    unsigned int mask, addr;
    void (*f0)(void);
    static void run(void);
    vu32 *p;

    if (((getcp0reg(C0_CONFIG)&CONFIG_EC) >> 28) != 1)
	IO_WRITE(MI_CTRL_REG, MI_CTRL_HARD_RESET|MI_CTRL_DIV_MODE_1_5);

    test_preamble();

    initICache();
    initDCache();
    init_ddr();

    p = (vu32 *) (K0BASE + FRAME_BUFFER);
    for (i=0; i<HEIGHT; i++) {
         for (j=0; j<8; j++) {
              for (k=0; k<WORDS_PER_LINE/8; k++)
                  *p++ = bars[j];
         }
    }

    message("DDR access test\n");
    DBG_JTAG_PASS("DDR access test passed\n");
    test_postamble();
    return 0;
}