pi_util.h 6.18 KB
#ifndef __PIDV_UTIL_HDR__
#define __PIDV_UTIL_HDR__

#include <stdio.h>

#define _LANGUAGE_C
#include <bcp.h>
#include <bbnand.h>
#include <bbsim.h>
#include <ultratypes.h>
#include "../trace.h"
#include "../iomap.h"
#include "../iotest.h"
#include "../simipc.h"
#include "../bcp_util.h"

typedef unsigned int uint;

#define PASS 0
#define FAIL 1
#define TESTERROR 2


#define OUTPUT_TEST_PASSFAIL(_result) \
    if((_result)==PASS) \
        printf("PASS\n"); \
    else if((_result)==FAIL) \
        printf("FAIL\n"); \
    else \
        printf("TESTERROR, FAIL\n")

#define IS_BIG_DEVICE(_size) ((_size)<0x4000000 ? 0 : 1)


#define PI_CTRL_DEV_SHIFT(devId) \
          (((devId)<<PI_FLASH_CTRL_DEV_SHIFT)&PI_FLASH_CTRL_DEV_MASK)
#define PI_CTRL_BUF_SHIFT(buf)   \
          ((buf)==1 ? PI_FLASH_CTRL_BUF1 : PI_FLASH_CTRL_BUF0)
#define PI_AES_DATA_SHIFT(data)  \
          (((data)<<PI_AES_CTRL_DATA_SHIFT)&PI_AES_CTRL_DATA_MASK)
#define PI_AES_IV_SHIFT(iv)      \
          (((iv)<<PI_AES_CTRL_IV_SHIFT)&PI_AES_CTRL_IV_MASK)
#define PI_AES_SIZE_SHIFT(size)  \
          (((size)<<PI_AES_CTRL_SIZE_SHIFT)&PI_AES_CTRL_SIZE_MASK)


#define PI_READ_ID_BASE     0x91900002
#define PI_AES_CTRL_BASE    0x80000000

/* FLASHBUSYTIMEOUT in nanosec. Used in flashCtrlPollBusy() */
#define FLASHBUSYTIMEOUT (120000)

#define FLASH_ERASE_POLL_LIMIT 100

#define POLL_CTRL_BUSY \
          do{}while((IO_READ(PI_FLASH_CTRL_REG))&PI_FLASH_CTRL_BUSY)
#define POLL_CTRL_BUSY_TIMEOUT \
          do{int ret;if((ret=flashCtrlPollBusy())!=PASS)return -1;}while(0)
#define POLL_AES_BUSY  do{}while((IO_READ(PI_AES_CTRL_REG))&PI_AES_CTRL_BUSY)
#define POLL_DMA_STATUS  do{}while((IO_READ(PI_STATUS_REG))&PI_STATUS_DMA_BUSY)

#define CHECK_FLASH_INTR (IO_READ(PI_FLASH_CTRL_REG) & PI_FLASH_CTRL_INTR)

#define FLASH_STATUS_SUCCESS(_s) (((_s)&1) == 0 ? PASS : FAIL)
#define FLASH_STATUS_WP(_s)      (!((_s)&0x80))

#define FLASH_PROG_ERASE_FAIL_RETURN(_ret)                         \
    if((_ret)<0){                                                  \
        return TESTERROR;                                          \
    }                                                              \
    if(FLASH_STATUS_SUCCESS((_ret)) == FAIL){                      \
        if(FLASH_STATUS_WP((_ret))){                               \
        _TRACE(DERROR, fprintf(LogFp,                              \
               "Is write protect enabled for this device? %08x\n", \
               (_ret)));                                           \
        }                                                          \
        return FAIL;                                               \
    }

/* int checking helpers for DMA */
#define PI_CPU_INTR_IS_SET   (CHECK_INTERRUPT&1)
#define PI_CPU_EINTR_IS_SET  (CHECK_INTERRUPT&2)
#define MI_PI_INTR_IS_SET    (IO_READ(MI_INTR_REG)&MI_INTR_PI)
#define PI_CLEAR_DMA_INT     (IO_WRITE(PI_STATUS_REG,PI_STATUS_CLR_INTR))
#define PI_RESET_DMA         (IO_WRITE(PI_STATUS_REG,PI_STATUS_RESET))

/* error interrupt/trap check helpers*/
#define MI_SFATAL_RESET      (IO_WRITE(MI_SEC_MODE_REG, (IO_READ(MI_SEC_MODE_REG) & 0xffffffef)))
#define MI_INTR_EMASK_SET    (IO_WRITE(MI_INTR_EMASK_REG, 0x00080000))
#define MI_INTR_EMASK_RESET  (IO_WRITE(MI_INTR_EMASK_REG, 0x00040000))
    

#ifndef MIN
#define MIN(a,b) ((a)<(b) ? (a) : (b))
#endif

#ifndef MAX
#define MAX(a,b) ((a)>(b) ? (a) : (b))
#endif

/* endian conversion macros for little-endian host */
#define H2BE4(a) (htonl(a))
#define BE2H4(a) (ntohl(a))
#define H2LE4(a) (a)

/* helper for toggling buffers */
#define TOGGLE (toggle = (toggle+1)&1)
#define TOGGLE_INIT int toggle=1
#define TOGGLE_VAL (toggle)
#define TOGGLE_VAL_NEXT ((toggle+1)&1)


/* write a host buffer of bytes with endian considerations
   so the resulting byte pattern is the same in the piBuffer.

   the bytes arg should be a multiple of 4.
*/
void ioWriteBuffer(u8 *data,u32 bytes,u32 bufStart);
void ioReadBuffer(u8 *data,u32 bytes,u32 bufStart);

/* driver function return values */
#define DRIVER_ECC_SGL_DBL_BITERR     -3  /* both on */
#define DRIVER_ECC_DBL_BITERR         -2
/* XXX: DRIVER_ERROR must stay -1 (some code hardcodes -1) */
#define DRIVER_ERROR                  -1
#define DRIVER_OK                      0
#define DRIVER_ECC_NO_ACTION (DRIVER_OK)
#define DRIVER_ECC_SGL_BITERR          1
#define PI_DMA_DRAM_GUARD 0xabababab
#define PI_DMA_BUF_GUARD  0xcdcdcdcd

/* insures compatible-mode int bits clear at CPU and MI */
int piCheckIntClear();

/* "driver" functions */
void initFlash();
int eraseBlock(
    u32 eraseAddr,
    u32 devId,
    u32 statusReadAddr,
    u32 buffer,
    int bigDevice,
    int enableIntr);
int statusRead(u32 statusReadAddr,
    u32 devId,
    u32 buffer,
    int enableIntr);
int programFullPage(
    u32 addr,
    u32 piBuffer,
    u32 device,
    uint eccOn,
    u8  *data,
    u8  *oob,
    u32 piStatBuffer,
    int bigDevice,
    int enableIntr);
int readFullPage(
    u32 piBuffer,
    u32 dev,
    u32 addr, /* must be 512B aligned */
    uint eccOn,
    u8 *buf,
    u8 *oob,
    int bigDevice,
    int enableIntr);
int readSecondHalfPage(
    u32 piBuffer,
    u32 dev,
    u32 addr, /* must be 512B aligned */
    uint eccOn,
    u8 *buf,
    u8 *oob,
    int bigDevice,
    int enableIntr);
int readPartialPage(
    u32 piBuffer,
    u32 dev,
    u32 addr,
    u32 bytes,
    u8 *buf,
    int bigDevice,
    int enableIntr);
int readPartialPageOob(
    u32 piBuffer,
    u32 dev,
    u32 addr,
    u32 bytes,
    u8 *buf,
    int bigDevice,
    int enableIntr);
int flashCheckClearIntr();
int flashCheckNoIntr();
int aesStart(u32 dataOffset,u32 initVectOffset,u32 dataSize,int enableIntr, int hardwareChaining);
int flashFileGetPage(FILE *fp,u32 pageNum,u8 *buf);
int flashCtrlPollBusy();
int insertMemModule();
int removeMemModule();
int setMemModPresenceQuick(int remove);
int toggleFlashIntMask(int new_state);

void atbWrite(u32 wordLow,u32 bits9,u32 addrOffset);
void atbRead(u32 *wordLow,u32 *bits9,u32 addrOffset);
int pollDMA(long long expected_time);
int checkDramStartGuardBand(u32 dram_addr);
int checkDramEndGuardBand(u32 dram_addr);
void goIntoSecureMode();
void exitSecureModeGrantAccess();
u32 getSecureModeRegister();
int checkMIErrorIntrSet();
int checkCPUErrorIntrSet();
int resetSFATAL();
#endif