aenv.s 6.76 KB
/*************************************************************************
 *                                                                       *
 *               Copyright (C) 1994, Silicon Graphics, Inc.              *
 *                                                                       *
 *  These coded instructions, statements, and computer programs  contain *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and *
 *  are protected by Federal copyright  law.  They  may not be disclosed *
 *  to  third  parties  or copied or duplicated in any form, in whole or *
 *  in part, without the prior written consent of Silicon Graphics, Inc. *
 *                                                                       *
 ************************************************************************/
	
/* aenv.s */
 
#define vstorem(x) vmadm x, vONE, vZERO[0]
#define vstoren(x) vmadn x, vONE, vZERO[0]

#define	VTGTL	0
#define	VRTLM	1
#define	VRTLL	2
#define	VTGTR	3
#define	VRTRM	4
#define	VRTRL	5
#define VAUXD	6
#define VAUXW	7

#define	VTGTLb	0
#define	VRTLMb	2
#define	VRTLLb	4
#define	VTGTRb	6
#define	VRTRMb	8
#define	VRTRLb	10
#define VAUXDb	12
#define VAUXWb	14

.name	updownVolL,	$23
.name	updownVolR,	$22
.name	outptrL,	$21
.name	outptrR,	$20
.name	auxptrL,	$19
.name	auxptrR,	$18
.name	loopctl,	$17
.name	inptr,		$16
.name	initflag,	$15
.name	temp,		$14
.name	count,		$3
.name	state_addr,	$2
.name	dm_state_addr,	$1

.name	vONE,		$v31
.name	vRAMP,		$v30
.name	voutL,		$v29
.name	voutR,		$v28
.name	vauxL,		$v27
.name	vauxR,		$v26
.name	venvparms,	$v24
.name	vtemp0,		$v23
.name	vtemp1,		$v22
.name	vfcvolL,	$v21
.name	vicvolL,	$v20
.name	vfcvolR,	$v19
.name	vicvolR,	$v18
.name	vin,		$v17
.name	vvout,		$v16
.name	vvaux,		$v15
.name	vfratL,		$v14
.name	viratL,		$v13
.name	vfratR,		$v12
.name	viratR,		$v11
.name	vconst,		$v10
.name	vZERO,		$v0

case_A_ENVMIX:
	sll	state_addr, aud1, 8
	srl	state_addr, state_addr, 8
	addi	state_addr, state_addr, 0
	
	lqv	vONE[0],   AL_CONST_C_ONE(zero)
	lqv	vconst[0], AL_CONST_C_SHIFT(zero)
	lqv	vRAMP[0],  AL_CONST_C_RAMP(zero)
				vxor	vZERO, vZERO, vZERO

	srl	temp, aud0, 16
	andi	initflag, temp, A_INIT
	bgtz	initflag, env_load_parameters
	addi	dm_state_addr, scrbase, ENV_STATE

	jal	DMAread
	addi	count, zero, ENV_STATE_SIZE8	
	
	mfc0	$5, DMA_BUSY
ENVwt1:	
	bne	$5, zero, ENVwt1
	mfc0	$5, DMA_BUSY

	mtc0	$0, SP_RESERVED

	lqv	vicvolL[0],   INT_VOL_OFFSETL(scrbase)
	lqv	vfcvolL[0],   FRAC_VOL_OFFSETL(scrbase)
	lqv	vicvolR[0],   INT_VOL_OFFSETR(scrbase)
	lqv	vfcvolR[0],   FRAC_VOL_OFFSETR(scrbase)

env_load_parameters:	
	lqv	venvparms[0], ENV_PARMS_OFFSET(scrbase)
	addi	inptr,   zero, AL_ENVMIXER_IN
	addi	outptrL, zero, AL_ENVMIXER_MAIN_L
	addi	outptrR, zero, AL_ENVMIXER_MAIN_R
	addi	auxptrL, zero, AL_ENVMIXER_AUX_L
	addi	auxptrR, zero, AL_ENVMIXER_AUX_R
	addi	loopctl, zero, AL_ALL_COUNTER

	mfc2	updownVolR, venvparms[VRTRMb]

env_main:
	beq	initflag, zero, no_update
	mfc2	updownVolL, venvparms[VRTLMb]

	addi	count, zero, ENV_STATE_SIZE8	
				vxor	vicvolL, vicvolL, vicvolL
	lsv	vicvolL[14], AL_ENVMIXER_PARAMETER_VOLL(scrbase)
				vxor	vfcvolL, vfcvolL, vfcvolL
	lqv	vin[0], 0(inptr)	
				vxor	vicvolR, vicvolR, vicvolR
	mtc2	aud0, vicvolR[14]
				vmudl	vtemp0, vRAMP, venvparms[VRTLL]
	lqv	voutL[0], 0(outptrL)
				vmadn	vtemp0, vRAMP, venvparms[VRTLM]
	lqv	vauxL[0], 0(auxptrL)
				vmadh	vicvolL, vONE, vicvolL[7]
	lqv	voutR[0], 0(outptrR)
				vstoren(vfcvolL)

	bgez	updownVolL, env_atkVol1L
				vxor	vfcvolR, vfcvolR, vfcvolR
	j	env_jp1L
				vge	vicvolL, vicvolL, venvparms[VTGTL]
env_atkVol1L:
				vlt	vicvolL, vicvolL, venvparms[VTGTL]
env_jp1L:
				vmudl	vtemp0, vRAMP, venvparms[VRTRL]
	lqv	vauxR[0], 0(auxptrR)
				vmadn	vtemp0, vRAMP, venvparms[VRTRM]
	addi	loopctl, loopctl, -16
			 	vmadh	vicvolR, vONE, vicvolR[7]
	addi	inptr, inptr, 16
				vstoren(vfcvolR)
				vmulf	vvout, vicvolL, venvparms[VAUXD]

	bgez	updownVolR, env_atkVol1R
				vmulf	vvaux, vicvolL, venvparms[VAUXW]
	j	env_jp1R
				vge	vicvolR, vicvolR, venvparms[VTGTR]
env_atkVol1R:
				vlt	vicvolR, vicvolR, venvparms[VTGTR]
env_jp1R:
				vmulf	voutL, voutL, vconst[5]
				vmacf	voutL, vin, vvout
				vmulf	vauxL, vauxL, vconst[5]
				vmacf	vauxL, vin, vvaux

				vmulf	vvout, vicvolR, venvparms[VAUXD]
				vmulf	vvaux, vicvolR, venvparms[VAUXW]
	sqv	voutL[0], 0(outptrL)
				vmulf	voutR, voutR, vconst[5]
	addi	outptrL, outptrL, 16
				vmacf	voutR, vin, vvout
	sqv	vauxL[0], 0(auxptrL)
				vmulf	vauxR, vauxR, vconst[5]
	addi	auxptrL, auxptrL, 16
				vmacf	vauxR, vin, vvaux
	sqv	voutR[0], 0(outptrR)
	addi	outptrR, outptrR, 16
	sqv	vauxR[0], 0(auxptrR)
	addi	auxptrR, auxptrR, 16

no_update:	
				vaddc	vfcvolL, vfcvolL, venvparms[VRTLL]
				vadd	vicvolL, vicvolL, venvparms[VRTLM]

env_loop:
 	lqv	voutL[0], 0(outptrL)
				vaddc	vfcvolR, vfcvolR, venvparms[VRTRL]
	lqv	vin[0], 0(inptr)
	bgez	updownVolL, env_atkVol2L
				vadd	vicvolR, vicvolR, venvparms[VRTRM]
	j	env_jp2L
				vge	vicvolL, vicvolL, venvparms[VTGTL]
env_atkVol2L:
				vlt	vicvolL, vicvolL, venvparms[VTGTL]
env_jp2L:
	bgez	updownVolR, env_atkVol2R
	lqv	vauxL[0], 0(auxptrL)
	j	env_jp2R
				vge	vicvolR, vicvolR, venvparms[VTGTR]
env_atkVol2R:
				vlt	vicvolR, vicvolR, venvparms[VTGTR]
env_jp2R:
				vmulf	vvout, vicvolL, venvparms[VAUXD]
	sqv	vicvolL[0], INT_VOL_OFFSETL(scrbase)
				vmulf	vvaux, vicvolL, venvparms[VAUXW]
	sqv	vfcvolL[0], FRAC_VOL_OFFSETL(scrbase)
				vmulf	voutL, voutL, vconst[5]
				vmacf	voutL, vin, vvout
	lqv	voutR[0], 0(outptrR)
				vmulf	vauxL, vauxL, vconst[5]
	lqv	vauxR[0], 0(auxptrR)
				vmacf	vauxL, vin, vvaux

	addi	loopctl, loopctl, -16
				vaddc	vfcvolL, vfcvolL, venvparms[VRTLL]
	addi	inptr, inptr, 16
				vadd	vicvolL, vicvolL, venvparms[VRTLM]
	sqv	voutL[0], 0(outptrL)
				vmulf	vvout, vicvolR, venvparms[VAUXD]
	addi	outptrL, outptrL, 16
				vmulf	vvaux, vicvolR, venvparms[VAUXW]
	sqv	vauxL[0], 0(auxptrL)
				vmulf	voutR, voutR, vconst[5]
	addi	auxptrL, auxptrL, 16
				vmacf	voutR, vin, vvout
				vmulf	vauxR, vauxR, vconst[5]
				vmacf	vauxR, vin, vvaux
	sqv	voutR[0], 0(outptrR)
	addi	outptrR, outptrR, 16
	blez	loopctl, env_fini
	sqv	vauxR[0], 0(auxptrR)
	j	env_loop
	addi	auxptrR, auxptrR, 16

env_fini:
	sqv	vicvolR[0], INT_VOL_OFFSETR(scrbase)
	sqv	vfcvolR[0], FRAC_VOL_OFFSETR(scrbase)
	jal	DMAwrite
	sqv	venvparms[0], ENV_PARMS_OFFSET(scrbase)

	mfc0	$5, DMA_BUSY
ENVwt2:	
	bne	$5, zero, ENVwt2
	mfc0	$5, DMA_BUSY

	mtc0	$0, SP_RESERVED

	j	AudDone
	addi	dlcount, dlcount, -8

.unname updownVolL
.unname updownVolR
.unname	outptrL
.unname	outptrR
.unname	auxptrL
.unname	auxptrR
.unname	loopctl
.unname	inptr
.unname initflag
.unname	temp
.unname	count
.unname	state_addr
.unname	dm_state_addr

.unname	vONE
.unname	vRAMP
.unname	voutL
.unname	voutR
.unname	vauxL
.unname	vauxR
.unname	venvparms
.unname	vtemp0
.unname	vtemp1
.unname	vfcvolL
.unname	vicvolL
.unname	vfcvolR
.unname	vicvolR
.unname vin
.unname vconst
.unname vZERO