module = io_ri

search_path = search_path + "../src" + "../inc" + \
   "../../lib/verilog/user" + "../syn"

/* read the compiled netlists */
read -f edif io_ri.edf_p
read -f edif ../sb/syn/rspbusses.edf
read -f edif ../io/syn/io_cmd_dma.edf
read -f edif ../io/syn/io_mem_dma.edf
read -f edif ../ri/syn/ri.edf

current_design = io_ri

link 

ungroup -all -flatten 

check_design > io_ri.lint

/* enforce naming restrictions for Compass tools */
change_names -rules compass_rules -hierarchy

/* standard reports & netlist */

include "report.dc"

write -f edif -o io_ri.edf io_ri -hier

quit