Makefile
3.21 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
#!smake
PRDEPTH = ../../..
include $(PRDEPTH)/PRdefs
include $(PRDEPTH)/PRrules
INCDIR = inc
LIBDIR = ../lib/verilog/user
AIDIR = ai
ARDIR = ar
ATDIR = at
BLDIR = bl
CCDIR = cc
CSDIR = cs
CVDIR = cv
EPDIR = ep
EWDIR = ew
IODIR = io
LSDIR = ls
MIDIR = mi
MSDIR = ms
PIDIR = pi
RDPDIR = rdp
RIDIR = ri
RSPDIR = rsp
SBDIR = sb
SIDIR = si
STDIR = st
SUDIR = su
TCDIR = tc
TFDIR = tf
TMDIR = tm
TSTDIR = tst
VIDIR = vi
VUDIR = vu
default: all
all: rsp rdp iop
cd syn ; make
rsp: ls sb su vu
cd rsp/syn ; make
rdp: at bl cc cs cv ep ew ms st tc tf tm
cd rdp/syn ; make
iop: ai ar io mi pi ri si tst vi
ai: $(AIDIR)/syn/ai.vsyn
ar: $(ARDIR)/syn/arb.vsyn
at: $(ATDIR)/syn/at.vsyn
bl: $(BLDIR)/syn/bl.vsyn
cc: $(CCDIR)/syn/cc.vsyn
cs: $(CSDIR)/syn/cs.vsyn
cv: $(CVDIR)/syn/cv.vsyn
ep: $(EPDIR)/syn/ep.vsyn
ew: $(EWDIR)/syn/ew.vsyn
io: $(IODIR)/syn/io_mem_dma.vsyn $(IODIR)/syn/io_cmd_dma.vsyn
ls: $(LSDIR)/syn/ls.vsyn
mi: $(MIDIR)/syn/mi.vsyn
ms: $(MSDIR)/syn/ms.vsyn
pi: $(PIDIR)/syn/pi.vsyn
ri: $(RIDIR)/syn/ri.vsyn
sb: $(SBDIR)/syn/rspbusses.vsyn
si: $(SIDIR)/syn/si.vsyn
st: $(STDIR)/syn/st.vsyn
su: $(SUDIR)/syn/su.vsyn
tc: $(TCDIR)/syn/tc.vsyn
tf: $(TFDIR)/syn/tf.vsyn
tm: $(TMDIR)/syn/tm.vsyn
tst: $(TSTDIR)/syn/tst.vsyn
vi: $(VIDIR)/syn/vi.vsyn
vu: $(VUDIR)/syn/vu.vsyn
DIRT = $(AIDIR)/syn/*.vsyn $(AIDIR)/syn/*.edf \
$(ARDIR)/syn/*.vsyn $(ARDIR)/syn/*.edf \
$(ATDIR)/syn/*.vsyn $(ATDIR)/syn/*.edf \
$(BLDIR)/syn/*.vsyn $(BLDIR)/syn/*.edf \
$(CCDIR)/syn/*.vsyn $(CCDIR)/syn/*.edf \
$(CSDIR)/syn/*.vsyn $(CSDIR)/syn/*.edf \
$(CVDIR)/syn/*.vsyn $(CVDIR)/syn/*.edf \
$(EPDIR)/syn/*.vsyn $(EPDIR)/syn/*.edf \
$(EWDIR)/syn/*.vsyn $(EWDIR)/syn/*.edf \
$(IODIR)/syn/*.vsyn $(IODIR)/syn/*.edf \
$(LSDIR)/syn/*.vsyn $(LSDIR)/syn/*.edf \
$(MIDIR)/syn/*.vsyn $(MIDIR)/syn/*.edf \
$(MSDIR)/syn/*.vsyn $(MSDIR)/syn/*.edf \
$(PIDIR)/syn/*.vsyn $(PIDIR)/syn/*.edf \
$(RIDIR)/syn/*.vsyn $(RIDIR)/syn/*.edf \
$(SBDIR)/syn/*.vsyn $(SBDIR)/syn/*.edf \
$(SIDIR)/syn/*.vsyn $(SIDIR)/syn/*.edf \
$(STDIR)/syn/*.vsyn $(STDIR)/syn/*.edf \
$(SUDIR)/syn/*.vsyn $(SUDIR)/syn/*.edf \
$(TCDIR)/syn/*.vsyn $(TCDIR)/syn/*.edf \
$(TFDIR)/syn/*.vsyn $(TFDIR)/syn/*.edf \
$(TMDIR)/syn/*.vsyn $(TMDIR)/syn/*.edf \
$(TSTDIR)/syn/*.vsyn $(TSTDIR)/syn/*.edf \
$(VIDIR)/syn/*.vsyn $(VIDIR)/syn/*.edf \
$(VUDIR)/syn/*.vsyn $(VUDIR)/syn/*.edf
include $(AIDIR)/syn/Makefile.include
include $(ARDIR)/syn/Makefile.include
include $(ATDIR)/syn/Makefile.include
include $(BLDIR)/syn/Makefile.include
include $(CCDIR)/syn/Makefile.include
include $(CSDIR)/syn/Makefile.include
include $(CVDIR)/syn/Makefile.include
include $(EPDIR)/syn/Makefile.include
include $(EWDIR)/syn/Makefile.include
include $(IODIR)/syn/Makefile.include
include $(LSDIR)/syn/Makefile.include
include $(MIDIR)/syn/Makefile.include
include $(MSDIR)/syn/Makefile.include
include $(PIDIR)/syn/Makefile.include
include $(RIDIR)/syn/Makefile.include
include $(SBDIR)/syn/Makefile.include
include $(SIDIR)/syn/Makefile.include
include $(STDIR)/syn/Makefile.include
include $(SUDIR)/syn/Makefile.include
include $(TCDIR)/syn/Makefile.include
include $(TFDIR)/syn/Makefile.include
include $(TMDIR)/syn/Makefile.include
include $(TSTDIR)/syn/Makefile.include
include $(VIDIR)/syn/Makefile.include
include $(VUDIR)/syn/Makefile.include