sttop.synscr 419 Bytes
#!/bin/csh -f
#
# ASICSYN
#
vlsishell << EOF
set echo on
asicsyn

#
# verilog sources
#
load [v]sttop

set process slow
set temperature 40
set vddlevel 3.0

set autowrite false
set hdl verilog
synthesize
write

set maxdelay 15.0 * --> *
set maxrampdelay 3.0
set drive 0 clk
show cellhier
optimize
# speedup *

# show cellhier
report AREA
report LONGTIMING
write

# qtv
# show simparms
# trace critical

exit
exit
EOF
#