current_design = vusl

set_driving_cell -cell in01d1 vrf_vsdata0_mu
set_driving_cell -cell in01d1 vrf_vsdata1_mu
set_driving_cell -cell in01d1 vrf_vtdata0_mu
set_driving_cell -cell in01d1 vrf_vtdata1_mu

set_driving_cell -cell in01d7 su_cont_to_from


set_dont_touch dp_buf16
set_dont_touch dp_incdec16
set_dont_touch dp_2to1mx16
set_dont_touch dp_4to1mx16
set_dont_touch dp_8to1mx16
set_dont_touch dp_reg16
set_dont_touch dp_regmx16
set_dont_touch dp_regmx16hp
set_dont_touch dp_tribuf16
/*
*set_dont_touch dp_onedet
*set_dont_touch dp_zerodet
*/

current_design = dp_zerodet

dont_touch zerodet*

current_design = dp_csa32
dont_touch csa*

current_design = dp_adder16
/*
*dont_touch s*
*dont_touch c*
*dont_touch mux*
*/
dont_touch add*
dont_touch dpcsel*
dont_touch coutb*
dont_touch buf_carry7

/*
*remove_attribute find(cell, "addb8s0") dont_touch
*remove_attribute find(cell, "addb8c0") dont_touch
*remove_attribute find(cell, "addb8s1") dont_touch
*remove_attribute find(cell, "addb8c1") dont_touch
*/

/*
*set_dont_touch xo02d2
*set_dont_touch xn02d2
*set_dont_touch an02d2
*set_dont_touch or02d2
*set_dont_touch mx21d1
*/

current_design = dp_adder32
set_dont_touch dpadduprcin0
set_dont_touch dpadduprcin1
set_dont_touch dpaddlwr
set_dont_touch dpcarryselmx
set_dont_touch coutb30
set_dont_touch coutb31
/*
*dont_touch s*
*dont_touch c*
*dont_touch mux*
*set_dont_touch xo02d2
*set_dont_touch xn02d2
*set_dont_touch an02d2
*set_dont_touch or02d2
*set_dont_touch mx21d1
*/

current_design = vmult

set_max_transition 1.0 vum_shiftleft1_mu

ungroup -flatten csa_*
ungroup -flatten ha_*
ungroup -flatten cla
dont_touch csa_*
dont_touch ha_*
dont_touch cla*


current_design = vuctlsl

set_dont_touch  vctaluctlmx0mu
set_dont_touch  vctalucinmxmu
set_dont_touch  vctrndvlu1anac
set_dont_touch  vctrndvlu1mxac
set_dont_touch  vctrndvlu2aoac
set_dont_touch  vctrndvlu3mxac
set_dont_touch	vctacup1slmxac
set_dont_touch	vctclpsgnmuwb
set_dont_touch	vctcslwb0slmxac

current_design = vuctl

set_dont_touch vctcontbus0nt
set_dont_touch vctcontbus1nt
set_dont_touch vctcontbus2nt
set_dont_touch vctcontbus3nt

set_dont_touch vctcontbusmx0mu
set_dont_touch vctcontbusmx1mu
set_dont_touch vctcontbusmx2mu
set_dont_touch vctcontbusmx3mu

set_dont_touch vctcontbusin0mu
set_dont_touch vctcontbusin1mu

current_design = vusl

set_input_delay 8 -clock clk {reset_l};

set_input_delay 2.0 -clock clk {vrf_vsdata0_mu};
set_input_delay 2.0 -clock clk {vrf_vtdata0_mu};
set_input_delay 2.0 -clock clk {vrf_vsdata1_mu};
set_input_delay 2.0 -clock clk {vrf_vtdata1_mu};


set_input_delay 12 -clock clk {su_instvld_rd};
set_input_delay 14.5 -clock clk {su_instvldk_rd};
set_input_delay 10 -clock clk {su_vseqone_rd};
set_input_delay 8 -clock clk {su_instelem_rd};
set_input_delay 8 -clock clk {su_instfunc_rd};
set_input_delay 14.5 -clock clk {su_rdcmpcd_rd};
set_input_delay 14.5 -clock clk {su_rdcryout_rd};
set_input_delay 14.5 -clock clk {su_rdcmpcdad_rd};
set_input_delay 8 -clock clk {su_wrcmpcd_wb};
set_input_delay 8 -clock clk {su_wrcryout_wb};
set_input_delay 8 -clock clk {su_wrcmpcdad_wb};


set_input_delay 10 -clock clk {su_vs_addr_rd};
set_input_delay 14 -clock clk {su_vd_addr_ac};

set_input_delay 8 -clock clk {vdi_divrslt0_wb};
set_input_delay 8 -clock clk {vdi_divrslt1_wb};

set_output_delay -max 2 -clock clk {vct_instvld_ac};
set_output_delay -max 2 -clock clk {vct_dvtypop_ac};
set_output_delay -max 2 -clock clk {vct_vs_addr_ac};

set_output_delay -max 5 -clock clk {vdp_rslt_data0_wb};
set_output_delay -max 5 -clock clk {vdp_rslt_data1_wb};

set_input_delay 13 -clock clk {su_cont_to_from};
set_output_delay -max 13.0 -clock clk {su_cont_to_from};