writebackdcache.s
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#include <asm.h>
#include <regdef.h>
#include <R4300.h>
/*
* osWritebackDCache(void *addr, int nbytes)
*/
LEAF(osWritebackDCache)
.set mips3
blez a1,2f # If nbytes <= 0, bail
li t3,DCACHE_SIZE
bgeu a1,t3,3f # Is nbytes >= D-Cache size?
move t0,a0
addu t1,a0,a1
bgeu t0,t1,2f # (Check for address wrap)
subu t1,DCACHE_LINESIZE
andi t2,t0,DCACHE_LINEMASK
subu t0,t2
1:
.set noreorder
cache CACH_PD|C_HWB,0(t0) # If not, use hit writeback
bltu t0,t1,1b # only on given range
addu t0,DCACHE_LINESIZE
.set reorder
2:
j ra
3:
li t0,K0BASE
addu t1,t0,t3
subu t1,DCACHE_LINESIZE
4:
.set noreorder
cache CACH_PD|C_IWBINV,0(t0) # If so, use index writeback invalidate
bltu t0,t1,4b # on entire cache
addu t0,DCACHE_LINESIZE
.set reorder
j ra
.set mips0
END(osWritebackDCache)