initialize.c
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#include <R4300.h>
#include <rcp.h>
#include <ramrom.h>
#include "osint.h"
#include "piint.h"
#include "rdb.h"
typedef struct {
unsigned int inst1; /* lui k0,XXXX */
unsigned int inst2; /* addiu k0,k0,XXXX */
unsigned int inst3; /* jr k0 */
unsigned int inst4; /* nop */
} __osExceptionVector;
#define ASIC_STATUS 0x05000508
u64 osClockRate = 62500000LL;
int osViClock = VI_NTSC_CLOCK; /* Video clock rate (default is NTSC) */
s32 __osShutdown = 0; /* 1 = pre-NMI interrupt has occured */
OSIntMask __OSGlobalIntMask = OS_IM_ALL;
#ifdef _FINALROM
s32 __osFinalrom;
#else
s32 __kmc_pt_mode;
void *__printfunc = NULL;
#endif
#if 0
#ifndef _FINALROM
static void ptstart(void)
{
}
#endif
#endif
void __createSpeedParam(void)
{
/* for domain1 */
__Dom1SpeedParam.type = DEVICE_TYPE_INIT;
__Dom1SpeedParam.latency = (u8)IO_READ(PI_BSD_DOM1_LAT_REG);
__Dom1SpeedParam.pulse = (u8)IO_READ(PI_BSD_DOM1_PWD_REG);
__Dom1SpeedParam.pageSize = (u8)IO_READ(PI_BSD_DOM1_PGS_REG);
__Dom1SpeedParam.relDuration = (u8)IO_READ(PI_BSD_DOM1_RLS_REG);
/* for domain2 */
__Dom2SpeedParam.type = DEVICE_TYPE_INIT;
__Dom2SpeedParam.latency = (u8)IO_READ(PI_BSD_DOM2_LAT_REG);
__Dom2SpeedParam.pulse = (u8)IO_READ(PI_BSD_DOM2_PWD_REG);
__Dom2SpeedParam.pageSize = (u8)IO_READ(PI_BSD_DOM2_PGS_REG);
__Dom2SpeedParam.relDuration = (u8)IO_READ(PI_BSD_DOM2_RLS_REG);
}
void
__osInitialize_common(void)
{
u32 pifdata;
/*
* Turn on FS bit to flush denormalized number to zero;
* enable "invalid operation" faulting to catch generation of NaNs.
*/
#ifdef _FINALROM
__osFinalrom = 1;
#endif
__osSetSR(__osGetSR() | SR_CU1);
__osSetFpcCsr(FPCSR_FS | FPCSR_EV);
/* Set no watch exception (adr:0x04900000,R:0,W:0) */
__osSetWatchLo(0x04900000);
#ifndef _HW_VERSION_1
/* send flag to PIF to enable NMI */
while(__osSiRawReadIo(PIF_RAM_START+0x3c, &pifdata));
while (__osSiRawWriteIo(PIF_RAM_START+0x3c, pifdata|8));
#endif
*(__osExceptionVector *)UT_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
*(__osExceptionVector *)XUT_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
*(__osExceptionVector *)ECC_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
*(__osExceptionVector *)E_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
osWritebackDCache((void*)UT_VEC,
E_VEC - UT_VEC + sizeof(__osExceptionVector));
osInvalICache((void*)UT_VEC,
E_VEC - UT_VEC + sizeof(__osExceptionVector));
/* Store current PI value to global variables */
__createSpeedParam();
/*
* TLB $B$N=i4|2=$r$7$F$*$/!#EE8;N)$A>e$2;~$OITDjCM$,F~$C$F$$$k(B
* $B$3$H$,$"$k$?$a!"=i4|2=$r$7$F$*$+$J$$$H(B TLB $B;HMQ;~$K8mF0:n$r(B
* $B$9$k2DG=@-$,$"$k!#(B
*/
osUnmapTLBAll();
/* set TLB for the debug port */
/* Global, 4K page, even-page only */
osMapTLBRdb();
/* *((vu32 *) RDB_WRITE_INTR_REG) = 0;
*((vu32 *) RDB_READ_INTR_REG) = 0; */
/* Set clock rate */
osClockRate = (osClockRate * 3) / 4;
/* zero out the NMI buffer if cold reset */
if (osResetType == 0) {
bzero(osAppNMIBuffer, OS_APP_NMI_BUFSIZE);
}
/* set video clock based on osTvType */
if (osTvType == OS_TV_PAL)
osViClock = VI_PAL_CLOCK;
else if (osTvType == OS_TV_MPAL)
osViClock = VI_MPAL_CLOCK;
else /* for now, we assume that it's NTSC */
osViClock = VI_NTSC_CLOCK;
/* check PreNMI */
if (__osGetCause() & CAUSE_IP5)
while(1);
/* set ai dma on */
IO_WRITE(AI_CONTROL_REG, AI_CONTROL_DMA_ON);
IO_WRITE(AI_DACRATE_REG, AI_MAX_DAC_RATE-1);
IO_WRITE(AI_BITRATE_REG, AI_MAX_BIT_RATE-1);
}
/* $B%G%P%C%,$N<oN`$r<+F0H=Dj$7$F!"5!<o$4$H$N=i4|2=$r9T$&(B */
void __osInitialize_autodetect(void)
{
#ifndef _FINALROM
if (__checkHardware_msp()){
__osInitialize_msp();
}else if (__checkHardware_kmc()){
__osInitialize_kmc();
}else if (__checkHardware_isv()){
__osInitialize_isv();
}else{
__osInitialize_emu();
}
#endif
}