csclk.c
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
/*
* Command Shuffle Unit, FIFO write logic
*/
#include <stdio.h>
#include <stdlib.h>
#include "csclk.h"
#define POSEDGE (save_clk && !save_clk_old)
#define NEGEDGE (!save_clk && save_clk_old)
/*
* G l o b a l s
*/
extern unsigned int ShfMemMs[32]; /* most significant word */
extern unsigned int ShfMemLs[32]; /* least significant word */
/*
* command shuffle unit, interface routine for FIFO write logic
* Note that this logic runs off the clk signal.
*/
void
csclk(csclk_t **pp0, csclk_t **pp1)
{
csclk_t *p0, *p1;
int save_clk;
int save_clk_old;
/* async input signals */
int pre_req_dma = 0;
p0 = *pp0;
p1 = *pp1;
save_clk = p0->clk;
save_clk_old = p1->clk_old;
if(NEGEDGE) /* async inputs */
{
/* grab async inputs from p0 */
pre_req_dma = p0->pre_req_dma;
}
if(POSEDGE)
{
/* transfer all next-clock register values to register outputs. */
*pp0 = p1; /* swap */
*pp1 = p0;
p0 = *pp0; /* fix pointers */
p1 = *pp1;
}
if(POSEDGE || NEGEDGE)
{
/* Update all next-clock register values */
/* write data to FIFO */
if(p1->xbus_cs_valid)
{
ShfMemLs[p1->wr_adrs & 0x1f] = p1->xbus_cs_data.word0; /* least significant word */
ShfMemMs[p1->wr_adrs & 0x1f] = p1->xbus_cs_data.word1; /* most significant word */
}
/* update write address */
if(!p1->reset_l)
p0->wr_adrs = 0;
else
p0->wr_adrs = (p1->wr_adrs + p1->xbus_cs_valid) & 0x3f;
/* delay dma request signal */
p0->cs_xbus_req = pre_req_dma;
}
/* keep last clock state */
p0->clk_old = p1->clk_old = save_clk;
}
/*
* command shuffle unit initialization, FIFO write section
*/
void
csclk_init(csclk_t *p0, csclk_t *p1)
{
p0->clk = p1->clk = 0;
p0->clk_old = p1->clk_old = 0;
}