tf_test.v
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// Verilog model created from schematic tf_test.sch
// 2002/06/04 7:15:49 PM
// vericode v2.1
// Schematic 'tf_test.sch'
module tf_test;
wire [8:0] K0_COEFF;
wire [8:0] K1_COEFF;
wire [8:0] K2_COEFF;
wire [8:0] K3_COEFF;
wire [8:0] LOD_FRAC;
wire [7:0] SFRAC_RG;
wire [7:0] TFRAC_RG;
wire [7:0] SFRAC_BA;
wire [7:0] TFRAC_BA;
wire [8:0] TM_RA;
wire [8:0] TM_GA;
wire [8:0] TM_BA;
wire [8:0] TM_AA;
wire [8:0] TM_RB;
wire [8:0] TM_GB;
wire [8:0] TM_BB;
wire [8:0] TM_AB;
wire [8:0] TM_RC;
wire [8:0] TM_GC;
wire [8:0] TM_BC;
wire [8:0] TM_AC;
wire [8:0] TM_RD;
wire [8:0] TM_GD;
wire [8:0] TM_BD;
wire [8:0] TM_AD;
wire [8:0] TF_R;
wire [8:0] TF_G;
wire [8:0] TF_B;
wire [8:0] TF_A;
wire [8:0] TF_LOD_FRAC;
wire TF_LGE1;
wire LGE1;
wire MID_TEXEL;
wire CONVERT_ONE;
wire BILERP1M;
wire BILERP0M;
wire NCYC;
wire ST_SPAN;
wire CLK;
tf TF (.BILERP0M(BILERP0M), .BILERP1M(BILERP1M), .CONVERT_ONE(CONVERT_ONE),
.GCLK(CLK), .K0_COEFF(K0_COEFF[8:0]), .K1_COEFF(K1_COEFF[8:0]),
.K2_COEFF(K2_COEFF[8:0]), .K3_COEFF(K3_COEFF[8:0]), .LOD_FRAC({ LGE1,
}), .MID_TEXEL(LOD_FRAC[8]), .NCYC(MID_TEXEL), .SFRAC_BA({ NCYC,
}), .SFRAC_RG(SFRAC_BA[7:0]), .ST_SPAN(SFRAC_RG[7]), .TF_A(TM_RD[8:0]),
.TF_B(TF_A[8:0]), .TF_G(TF_B[8:0]), .TF_LOD_FRAC(TF_G[8:0]),
.TF_R({ TF_LGE1, }), .TFRAC_BA({ ST_SPAN, }), .TFRAC_RG(TFRAC_BA[7:0]),
.TM_AA({ TFRAC_RG[7:0], TFRAC_RG[7] }), .TM_AB(TM_AA[8:0]),
.TM_AC(TM_AB[8:0]), .TM_AD(TM_AC[8:0]), .TM_BA(TM_AD[8:0]),
.TM_BB(TM_BA[8:0]), .TM_BC(TM_BB[8:0]), .TM_BD(TM_BC[8:0]),
.TM_GA(TM_BD[8:0]), .TM_GB(TM_GA[8:0]), .TM_GC(TM_GB[8:0]),
.TM_GD(TM_GC[8:0]), .TM_RA(TM_GD[8:0]), .TM_RB(TM_RA[8:0]),
.TM_RC(TM_RB[8:0]), .TM_RD(TM_RC[8:0]));
driver DRIVER (.BILERP0M(BILERP0M), .BILERP1M(BILERP1M), .CONVERT_ONE(CONVERT_ONE),
.GCLK(CLK), .K0_COEFF(K0_COEFF[8:0]), .K1_COEFF(K1_COEFF[8:0]),
.K2_COEFF(K2_COEFF[8:0]), .K3_COEFF(K3_COEFF[8:0]), .LGE1(LGE1),
.LOD_FRAC(LOD_FRAC[8:0]), .MID_TEXEL(MID_TEXEL), .NCYC(NCYC),
.SFRAC_BA(SFRAC_BA[7:0]), .SFRAC_RG(SFRAC_RG[7:0]), .ST_SPAN(ST_SPAN),
.TFRAC_BA(TFRAC_BA[7:0]), .TFRAC_RG(TFRAC_RG[7:0]), .TM_AA(TM_AA[8:0]),
.TM_AB(TM_AB[8:0]), .TM_AC(TM_AC[8:0]), .TM_AD(TM_AD[8:0]),
.TM_BA(TM_BA[8:0]), .TM_BB(TM_BB[8:0]), .TM_BC(TM_BC[8:0]),
.TM_BD(TM_BD[8:0]), .TM_GA(TM_GA[8:0]), .TM_GB(TM_GB[8:0]),
.TM_GC(TM_GC[8:0]), .TM_GD(TM_GD[8:0]), .TM_RA(TM_RA[8:0]),
.TM_RB(TM_RB[8:0]), .TM_RC(TM_RC[8:0]), .TM_RD(TM_RD[8:0]));
endmodule