ep.c
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
#include <stdio.h>
#include "ep.h"
/*
* Edge Walker Pipe Unit
*
* This module delays edge walker calulated attribute start points
* for the span until needed by various modules in the pipeline.
*
*
* 9/1/94 RJM
* 9/30/94 RJM Reduced width of pipe from 32 to 22 bits.
* $Id: ep.c,v 1.1.1.1 2002/05/02 03:29:03 blythe Exp $
*/
#define POSEDGE (save_clk && !save_clk_old)
#define NEGEDGE (!save_clk && save_clk_old)
/*====================================================================
= ep(): main interface routine for edge walker pipe unit
=
====================================================================
*/
void
ep(ep_t **pp0, ep_t **pp1)
{
/* pointers to memory structure */
ep_t *p0, *p1;
int i;
int save_clk;
int save_clk_old;
int two_cycle;
/*
* Get pointers, clocks
*/
p0 = *pp0;
p1 = *pp1;
save_clk = p0->gclk;
save_clk_old = p1->gclk_old;
if(POSEDGE)
{
/* transfer all next-clock register values to register outputs. */
*pp0 = p1; /* swap */
*pp1 = p0;
p0 = *pp0; /* fix pointers */
p1 = *pp1;
/* delay tc load */
p0->tc_load_1d = p1->tc_load;
/* Update all next-clock register values */
p0->st_span_1d = p1->ew_st_span;
p0->st_span_2d = p1->st_span_1d;
p0->st_span_3d = p1->st_span_2d;
p0->st_span_4d = p1->st_span_3d;
p0->st_span_5d = p1->st_span_4d;
p0->st_span_6d = p1->st_span_5d;
p0->st_span_7d = p1->st_span_6d;
p0->st_span_8d = p1->st_span_7d;
p0->st_span_9d = p1->st_span_8d;
p0->st_span_10d = p1->st_span_9d;
p0->st_span_11d = p1->st_span_10d;
p0->st_span_12d = p1->st_span_11d;
p0->st_span_13d = p1->st_span_12d;
p0->st_span_14d = p1->st_span_13d;
p0->st_span_15d = p1->st_span_14d;
p0->st_span_16d = p1->st_span_15d;
p0->st_span_17d = p1->st_span_16d;
p0->st_span_18d = p1->st_span_17d;
p0->st_span_19d = p1->st_span_18d;
p0->st_span_20d = p1->st_span_19d;
p0->st_span_21d = p1->st_span_20d;
p0->d_1d = p1->ew_d;
p0->d_2d = p1->d_1d;
p0->d_3d = p1->d_2d;
p0->d_4d = p1->d_3d;
p0->d_5d = p1->d_4d;
p0->d_6d = p1->d_5d;
p0->d_7d = p1->d_6d;
p0->d_8d = p1->d_7d;
p0->d_9d = p1->d_8d;
p0->d_10d = p1->d_9d;
p0->x_offset_1d = p1->cv_x_offset;
p0->x_offset_2d = p1->x_offset_1d;
p0->x_offset_3d = p1->x_offset_2d;
p0->x_offset_4d = p1->x_offset_3d;
p0->x_offset_5d = p1->x_offset_4d;
p0->x_offset_6d = p1->x_offset_5d;
p0->x_offset_7d = p1->x_offset_6d;
p0->x_offset_8d = p1->x_offset_7d;
p0->x_offset_9d = p1->x_offset_8d;
p0->x_offset_10d = p1->x_offset_9d;
p0->x_offset_11d = p1->x_offset_10d;
p0->x_offset_12d = p1->x_offset_11d;
p0->x_offset_13d = p1->x_offset_12d;
p0->x_offset_14d = p1->x_offset_13d;
p0->x_offset_15d = p1->x_offset_14d;
p0->x_offset_16d = p1->x_offset_15d;
p0->x_offset_17d = p1->x_offset_16d;
p0->x_offset_18d = p1->x_offset_17d;
p0->x_offset_19d = p1->x_offset_18d;
p0->x_offset_20d = p1->x_offset_19d;
p0->x_offset_21d = p1->x_offset_20d;
p0->x_offset_22d = p1->x_offset_21d;
p0->y_offset_1d = p1->cv_y_offset;
p0->y_offset_2d = p1->y_offset_1d;
p0->y_offset_3d = p1->y_offset_2d;
p0->y_offset_4d = p1->y_offset_3d;
p0->y_offset_5d = p1->y_offset_4d;
p0->y_offset_6d = p1->y_offset_5d;
p0->y_offset_7d = p1->y_offset_6d;
p0->y_offset_8d = p1->y_offset_7d;
p0->y_offset_9d = p1->y_offset_8d;
p0->y_offset_10d = p1->y_offset_9d;
p0->y_offset_11d = p1->y_offset_10d;
p0->y_offset_12d = p1->y_offset_11d;
p0->y_offset_13d = p1->y_offset_12d;
p0->y_offset_14d = p1->y_offset_13d;
p0->y_offset_15d = p1->y_offset_14d;
p0->y_offset_16d = p1->y_offset_15d;
p0->y_offset_17d = p1->y_offset_16d;
p0->y_offset_18d = p1->y_offset_17d;
p0->y_offset_19d = p1->y_offset_18d;
p0->y_offset_20d = p1->y_offset_19d;
p0->y_offset_21d = p1->y_offset_20d;
p0->y_offset_22d = p1->y_offset_21d;
p0->cvg_1d = p1->cv_cvg;
p0->cvg_2d = p1->cvg_1d;
p0->cvg_3d = p1->cvg_2d;
p0->cvg_4d = p1->cvg_3d;
p0->cvg_5d = p1->cvg_4d;
p0->cvg_6d = p1->cvg_5d;
p0->cvg_7d = p1->cvg_6d;
p0->cvg_8d = p1->cvg_7d;
p0->cvg_9d = p1->cvg_8d;
p0->cvg_10d = p1->cvg_9d;
p0->cvg_11d = p1->cvg_10d;
p0->cvg_12d = p1->cvg_11d;
p0->cvg_13d = p1->cvg_12d;
p0->cvg_14d = p1->cvg_13d;
p0->cvg_15d = p1->cvg_14d;
p0->cvg_16d = p1->cvg_15d;
p0->cvg_17d = p1->cvg_16d;
p0->cvg_18d = p1->cvg_17d;
p0->cvg_19d = p1->cvg_18d;
p0->cvg_20d = p1->cvg_19d;
p0->cvg_21d = p1->cvg_20d;
p0->mask_1d = p1->cv_mask;
p0->mask_2d = p1->mask_1d;
p0->mask_3d = p1->mask_2d;
p0->mask_4d = p1->mask_3d;
p0->mask_5d = p1->mask_4d;
p0->mask_6d = p1->mask_5d;
p0->mask_7d = p1->mask_6d;
p0->mask_8d = p1->mask_7d;
p0->mask_9d = p1->mask_8d;
p0->mask_10d = p1->mask_9d;
p0->mask_11d = p1->mask_10d;
p0->mask_12d = p1->mask_11d;
p0->mask_13d = p1->mask_12d;
p0->mask_14d = p1->mask_13d;
p0->mask_15d = p1->mask_14d;
p0->mask_16d = p1->mask_15d;
p0->mask_17d = p1->mask_16d;
p0->mask_18d = p1->mask_17d;
p0->mask_19d = p1->mask_18d;
p0->mask_20d = p1->mask_19d;
p0->mask_21d = p1->mask_20d;
p0->mask_22d = p1->mask_21d;
p0->mask_23d = p1->mask_22d;
p0->mask_24d = p1->mask_23d;
/*
* Assign Outputs, one register delay
*/
two_cycle = p1->cycle_type == 1;
p0->st_span_st_w = p1->tlut_en ? p1->st_span_4d : p1->st_span_6d;
p0->st_span_st_l = p1->tlut_en ? p1->st_span_5d : p1->st_span_7d;
p0->st_span_st_s = (p1->tlut_en && !p1->tc_load_1d) ? p1->st_span_6d : p1->st_span_8d;
p0->st_span_st_t = (p1->tlut_en && !p1->tc_load_1d)? p1->st_span_6d : p1->st_span_8d;
p0->st_span_st_r = p1->st_span_17d;
p0->st_span_st_g = p1->st_span_17d;
p0->st_span_st_b = p1->st_span_17d;
p0->st_span_st_a = p1->st_span_17d;
p0->st_span_st_z = two_cycle ? p1->st_span_20d : p1->st_span_19d;
p0->st_span_tc = (p1->tlut_en && !p1->tc_load_1d) ? p1->st_span_5d : p1->st_span_7d;
p0->st_span_tf = p1->st_span_15d;
p0->st_span_cc = p1->st_span_17d;
p0->st_span_bl = two_cycle ? p1->st_span_20d : p1->st_span_19d;
p0->st_span_ms = two_cycle ? p1->st_span_17d : p1->st_span_15d;
p0->d_w = p1->tlut_en ? p1->ew_d : p1->d_2d;
p0->d_l = p1->tlut_en ? p1->ew_d : p1->d_2d;
p0->d_s = (p1->tlut_en && !p1->tc_load_1d) ? p1->ew_d : p1->d_2d;
p0->d_t = (p1->tlut_en && !p1->tc_load_1d) ? p1->ew_d : p1->d_1d;
p0->d_r = p1->d_9d;
p0->d_g = p1->d_8d;
p0->d_b = p1->d_7d;
p0->d_a = p1->d_6d;
p0->d_z = two_cycle ? p1->d_8d : p1->d_7d;
p0->x_offset_r = p1->x_offset_18d;
p0->x_offset_g = p1->x_offset_18d;
p0->x_offset_b = p1->x_offset_18d;
p0->x_offset_a = p1->x_offset_18d;
p0->x_offset_z = two_cycle ? p1->x_offset_21d : p1->x_offset_20d;
p0->y_offset_r = p1->y_offset_18d;
p0->y_offset_g = p1->y_offset_18d;
p0->y_offset_b = p1->y_offset_18d;
p0->y_offset_a = p1->y_offset_18d;
p0->y_offset_z = two_cycle ? p1->y_offset_21d : p1->y_offset_20d;
p0->cvg_cc = p1->cvg_20d;
p0->mask_bl = two_cycle ? p1->mask_23d : p1->mask_22d;
} /* exec module */
/* save last clock state */
p0->gclk_old = p1->gclk_old = save_clk;
}
/*====================================================================
= ep_init(): initialization routine for edge walker pipe unit
=
====================================================================
*/
void
ep_init(ep_t *p0, ep_t *p1)
{
p1->gclk = p0->gclk = 0;
p1->gclk_old = p0->gclk_old = 0;
}