mc.s
14.6 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
#include "mc.h"
/*
#define _FVADDB2
#define _FVADDB4
*/
mc:
addi rtn2, return, 0
addi dum2, rzero, MC_SWITCH_TABLE
la dum, x0y0
sw dum, 0(dum2)
la dum, x1y0
sw dum, 4(dum2)
la dum, x0y1
sw dum, 8(dum2)
la dum, x1y1
sw dum, 12(dum2)
lqv vconsts[0], MC_CONSTS(dum2)
#define xyh dum2
#ifdef _PERFTEST
ori mc_in_mvx, rzero, 3
ori mc_in_mvy, rzero, 3
#endif
andi xh, mc_in_mvx, 1
andi yh, mc_in_mvy, 1
sll xyh, yh, 1
or xyh, xyh, xh /* XYH = (2*yh)+xh */
sll dum, xyh, 2
lw mc4, MC_SWITCH_TABLE(dum)
sra dum, mc_in_mvx, 1 /* toss the fraction */
andi dum, dum, 0x7 /* remaining offset within MB */
add xLbase, dum, mc_in_dat
addi xObase, mc_out_dat, 0
addi Lbasep1, xLbase, 1
jalr mc4
nop
jalr mc4
nop
jalr mc4
nop
jalr mc4
nop
/* Chroma */
sra dum2, mc_in_mvx, 31
and dum2, dum2, xh
add mc_in_mvx, dum2, mc_in_mvx
sra mc_in_mvx, mc_in_mvx, 1
sra dum, mc_in_mvy, 31
and dum, dum, yh
add mc_in_mvy, dum, mc_in_mvy
sra mc_in_mvy, mc_in_mvy, 1
andi xh, mc_in_mvx, 1
andi yh, mc_in_mvy, 1
sll xyh, yh, 1
or xyh, xyh, xh /* XYH = (2*yh)+xh */
sll dum, xyh, 2
lw mc4, MC_SWITCH_TABLE(dum)
sra dum, mc_in_mvx, 1 /* toss the fraction */
andi dum, dum, 0x3 /* remaining offset within MB */
sll dum, dum, 1 /* Fix for UV interleave */
add xLbase, dum, mc_in_dat
addi xLbase, xLbase, CrOffset
addi xObase, mc_out_dat, OCrOffset
addi Lbasep1, xLbase, 2
jalr mc4
nop
jalr mc4
nop
jr rtn2
nop
/*
* Have to use double because of arbitrary alignment
*/
x0y0:
ldv v0[0], 0(xLbase)
ldv v0[8], 8(xLbase)
ldv v1[0], 24(xLbase)
ldv v1[8], 32(xLbase)
ldv v2[0], 48(xLbase)
ldv v2[8], 56(xLbase)
ldv v3[0], 72(xLbase)
ldv v3[8], 80(xLbase)
finish:
blez mc_in_blend, dont_blend
addi xLbase, xLbase, 96
lqv t0[0], 0(xObase)
lqv t1[0], 16(xObase)
lqv t2[0], 32(xObase)
lqv t3[0], 48(xObase)
/*
vaddb2(v0, v0, t0)
vaddb2(v1, v1, t1)
vaddb2(v2, v2, t2)
vaddb2(v3, v3, t3)
*/
#ifdef _FVADDB2
vand vdum, v0, vconsts[HI_MASK]
vand vdum2, t0, vconsts[HI_MASK]
vand vdum3, v1, vconsts[HI_MASK]
vand vdum4, t1, vconsts[HI_MASK]
vmudl v0, vdum, vconsts[RSHFT]
vmadl v0, vdum2, vconsts[RSHFT]
vmudl v1, vdum3, vconsts[RSHFT]
vmadl v1, vdum4, vconsts[RSHFT]
vand vdum, v2, vconsts[HI_MASK]
vand vdum2, t2, vconsts[HI_MASK]
vand vdum3, v3, vconsts[HI_MASK]
vand vdum4, t3, vconsts[HI_MASK]
vmudl v2, vdum, vconsts[RSHFT]
vmadl v2, vdum2, vconsts[RSHFT]
vmudl v3, vdum3, vconsts[RSHFT]
vmadl v3, vdum4, vconsts[RSHFT]
#else
vmudl vdum, v0, vconsts[HI_BYTE]
vmadl vdum, t0, vconsts[HI_BYTE]
vand vdum2, v0, vconsts[LO_BYTE]
vand vdum3, t0, vconsts[LO_BYTE]
vmudl vdum4, v1, vconsts[HI_BYTE]
vmadl vdum4, t1, vconsts[HI_BYTE]
vmulf hi_res, vdum, vconsts[DIV2]
vadd vdum, vdum2, vdum3
vmudn v0, hi_res, vconsts[HI_BYTE]
vand vdum2, v1, vconsts[LO_BYTE]
vand vdum3, t1, vconsts[LO_BYTE]
vmulf lo_res, vdum, vconsts[DIV2]
vmudl vdum, v2, vconsts[HI_BYTE]
vmadl vdum, t2, vconsts[HI_BYTE]
vmulf hi_res, vdum4, vconsts[DIV2]
vadd vdum4, vdum2, vdum3
vadd v0, v0, lo_res
vmudn v1, hi_res, vconsts[HI_BYTE]
vand vdum2, v2, vconsts[LO_BYTE]
vand vdum3, t2, vconsts[LO_BYTE]
vmulf lo_res, vdum4, vconsts[DIV2]
vmudl vdum4, v3, vconsts[HI_BYTE]
vmadl vdum4, t3, vconsts[HI_BYTE]
vmulf hi_res, vdum, vconsts[DIV2]
vadd vdum, vdum2, vdum3
vadd v1, v1, lo_res
vmudn v2, hi_res, vconsts[HI_BYTE]
vand vdum2, v3, vconsts[LO_BYTE]
vand vdum3, t3, vconsts[LO_BYTE]
vmulf lo_res, vdum, vconsts[DIV2]
vmulf hi_res, vdum4, vconsts[DIV2]
vadd vdum4, vdum2, vdum3
vadd v2, v2, lo_res
vmudn v3, hi_res, vconsts[HI_BYTE]
vmulf lo_res, vdum4, vconsts[DIV2]
vadd v3, v3, lo_res
#endif
dont_blend:
sqv v0[0], 0(xObase)
sqv v1[0], 16(xObase)
sqv v2[0], 32(xObase)
sqv v3[0], 48(xObase)
addi xObase, xObase, 64
jr return
nop
x1y0:
/*
vaddb2(v0, v0, t0)
vaddb2(v1, v1, t1)
vaddb2(v2, v2, t2)
vaddb2(v3, v3, t3)
*/
ldv v0[0], 0(xLbase)
ldv v0[8], 8(xLbase)
ldv t0[0], 0(Lbasep1)
ldv t0[8], 8(Lbasep1)
#ifdef _FVADDB2
ldv v1[0], 24(xLbase)
ldv v1[8], 32(xLbase)
ldv t1[0], 24(Lbasep1)
ldv t1[8], 32(Lbasep1)
ldv v2[0], 48(xLbase)
vand vdum, v0, vconsts[HI_MASK]
ldv v2[8], 56(xLbase)
vand vdum2, t0, vconsts[HI_MASK]
ldv t2[0], 48(Lbasep1)
vand vdum3, v1, vconsts[HI_MASK]
ldv t2[8], 56(Lbasep1)
vand vdum4, t1, vconsts[HI_MASK]
ldv v3[0], 72(xLbase)
vmudl v0, vdum, vconsts[RSHFT]
ldv v3[8], 80(xLbase)
vmadl v0, vdum2, vconsts[RSHFT]
ldv t3[0], 72(Lbasep1)
vmudl v1, vdum3, vconsts[RSHFT]
ldv t3[8], 80(Lbasep1)
vmadl v1, vdum4, vconsts[RSHFT]
vand vdum, v2, vconsts[HI_MASK]
vand vdum2, t2, vconsts[HI_MASK]
vand vdum3, v3, vconsts[HI_MASK]
vand vdum4, t3, vconsts[HI_MASK]
vmudl v2, vdum, vconsts[RSHFT]
vmadl v2, vdum2, vconsts[RSHFT]
vmudl v3, vdum3, vconsts[RSHFT]
vmadl v3, vdum4, vconsts[RSHFT]
#else
ldv v1[0], 24(xLbase)
ldv v1[8], 32(xLbase)
ldv t1[0], 24(Lbasep1)
vmudl vdum, v0, vconsts[HI_BYTE]
ldv t1[8], 32(Lbasep1)
vmadl vdum, t0, vconsts[HI_BYTE]
ldv v2[0], 48(xLbase)
vand vdum2, v0, vconsts[LO_BYTE]
ldv v2[8], 56(xLbase)
vand vdum3, t0, vconsts[LO_BYTE]
ldv t2[0], 48(Lbasep1)
vmudl vdum4, v1, vconsts[HI_BYTE]
ldv t2[8], 56(Lbasep1)
vmadl vdum4, t1, vconsts[HI_BYTE]
ldv v3[0], 72(xLbase)
vmulf hi_res, vdum, vconsts[DIV2]
ldv v3[8], 80(xLbase)
vadd vdum, vdum2, vdum3
ldv t3[0], 72(Lbasep1)
vmudn v0, hi_res, vconsts[HI_BYTE]
ldv t3[8], 80(Lbasep1)
vand vdum2, v1, vconsts[LO_BYTE]
vand vdum3, t1, vconsts[LO_BYTE]
vmulf lo_res, vdum, vconsts[DIV2]
vmudl vdum, v2, vconsts[HI_BYTE]
vmadl vdum, t2, vconsts[HI_BYTE]
vmulf hi_res, vdum4, vconsts[DIV2]
vadd vdum4, vdum2, vdum3
vadd v0, v0, lo_res
vmudn v1, hi_res, vconsts[HI_BYTE]
vand vdum2, v2, vconsts[LO_BYTE]
vand vdum3, t2, vconsts[LO_BYTE]
vmulf lo_res, vdum4, vconsts[DIV2]
vmudl vdum4, v3, vconsts[HI_BYTE]
vmadl vdum4, t3, vconsts[HI_BYTE]
vmulf hi_res, vdum, vconsts[DIV2]
vadd vdum, vdum2, vdum3
vadd v1, v1, lo_res
vmudn v2, hi_res, vconsts[HI_BYTE]
vand vdum2, v3, vconsts[LO_BYTE]
vand vdum3, t3, vconsts[LO_BYTE]
vmulf lo_res, vdum, vconsts[DIV2]
vmulf hi_res, vdum4, vconsts[DIV2]
vadd vdum4, vdum2, vdum3
vadd v2, v2, lo_res
vmudn v3, hi_res, vconsts[HI_BYTE]
vmulf lo_res, vdum4, vconsts[DIV2]
vadd v3, v3, lo_res
#endif
j finish
addi Lbasep1, Lbasep1, 96
x0y1:
/*
vaddb2(v0, t0, t1)
vaddb2(v1, t1, t2)
vaddb2(v2, t2, t3)
vaddb2(v3, t3, t4)
*/
ldv t0[0], 0(xLbase)
ldv t0[8], 8(xLbase)
ldv t1[0], 24(xLbase)
ldv t1[8], 32(xLbase)
ldv t2[0], 48(xLbase)
ldv t2[8], 56(xLbase)
#ifdef _FVADDB2
ldv t3[0], 72(xLbase)
ldv t3[8], 80(xLbase)
ldv t4[0], 96(xLbase)
vand vdum, t0, vconsts[HI_MASK]
ldv t4[8], 104(xLbase)
vand vdum2, t1, vconsts[HI_MASK]
vand vdum3, t2, vconsts[HI_MASK]
vand vdum4, t3, vconsts[HI_MASK]
vmudl v0, vdum, vconsts[RSHFT]
vmadl v0, vdum2, vconsts[RSHFT]
vmudl v1, vdum2, vconsts[RSHFT]
vmadl v1, vdum3, vconsts[RSHFT]
vand vdum, t4, vconsts[HI_MASK]
vmudl v2, vdum3, vconsts[RSHFT]
vmadl v2, vdum4, vconsts[RSHFT]
vmudl v3, vdum4, vconsts[RSHFT]
vmadl v3, vdum, vconsts[RSHFT]
#else
ldv t3[0], 72(xLbase)
vmudl vdum, t0, vconsts[HI_BYTE]
ldv t3[8], 80(xLbase)
vmadl vdum, t1, vconsts[HI_BYTE]
ldv t4[0], 96(xLbase)
vand vdum2, t0, vconsts[LO_BYTE]
ldv t4[8], 104(xLbase)
vand vdum3, t1, vconsts[LO_BYTE]
vmudl vdum4, t1, vconsts[HI_BYTE]
vmadl vdum4, t2, vconsts[HI_BYTE]
vmulf hi_res, vdum, vconsts[DIV2]
vadd vdum, vdum2, vdum3
vmudn v0, hi_res, vconsts[HI_BYTE]
vand vdum2, t2, vconsts[LO_BYTE]
vmulf lo_res, vdum, vconsts[DIV2]
vmudl vdum, t2, vconsts[HI_BYTE]
vmadl vdum, t3, vconsts[HI_BYTE]
vmulf hi_res, vdum4, vconsts[DIV2]
vadd vdum4, vdum2, vdum3
vadd v0, v0, lo_res
vmudn v1, hi_res, vconsts[HI_BYTE]
vand vdum3, t3, vconsts[LO_BYTE]
vmulf lo_res, vdum4, vconsts[DIV2]
vmudl vdum4, t3, vconsts[HI_BYTE]
vmadl vdum4, t4, vconsts[HI_BYTE]
vmulf hi_res, vdum, vconsts[DIV2]
vadd vdum, vdum2, vdum3
vadd v1, v1, lo_res
vmudn v2, hi_res, vconsts[HI_BYTE]
vand vdum2, t4, vconsts[LO_BYTE]
vmulf lo_res, vdum, vconsts[DIV2]
vmulf hi_res, vdum4, vconsts[DIV2]
vadd vdum4, vdum2, vdum3
vadd v2, v2, lo_res
vmudn v3, hi_res, vconsts[HI_BYTE]
vmulf lo_res, vdum4, vconsts[DIV2]
vadd v3, v3, lo_res
#endif
j finish
nop
x1y1:
/*
vaddb4(v0, t1, t1p1, t2, t2p1)
vaddb4(v1, t1, t1p1, t2, t2p1)
vaddb4(v2, t1, t1p1, t2, t2p1)
vaddb4(v3, t1, t1p1, t2, t2p1)
*/
ldv t1[0], 0(xLbase) /* Prefetch */
ldv t1[8], 8(xLbase)
ldv t1p1[0], 0(Lbasep1)
ldv t1p1[8], 8(Lbasep1)
ldv t2[0], 24(xLbase)
ldv t2[8], 32(xLbase)
ldv t2p1[0], 24(Lbasep1)
ldv t2p1[8], 32(Lbasep1)
#ifdef _FVADDB4
vand vdum, t1, vconsts[HI_MASK]
ldv t1[0], 48(xLbase)
vand vdum2, t1p1, vconsts[HI_MASK]
ldv t1[8], 56(xLbase)
vand vdum3, t2, vconsts[HI_MASK]
ldv t1p1[0], 48(Lbasep1)
vand vdum4, t2p1, vconsts[HI_MASK]
ldv t1p1[8], 56(Lbasep1)
vmudl v0, vdum, vconsts[RSHFT]
ldv t2[0], 72(xLbase)
vmadl v0, vdum2, vconsts[RSHFT]
ldv t2[8], 80(xLbase)
vmudl v0h, vdum3, vconsts[RSHFT]
ldv t2p1[0], 72(Lbasep1)
vmadl v0h, vdum4, vconsts[RSHFT]
ldv t2p1[8], 80(Lbasep1)
vand vdum, t1, vconsts[HI_MASK]
ldv t1[0], 96(xLbase)
vand vdum2, t1p1, vconsts[HI_MASK]
ldv t1[8], 104(xLbase)
vand v0, v0, vconsts[HI_MASK]
ldv t1p1[0], 96(Lbasep1)
vand v0h, v0h, vconsts[HI_MASK]
ldv t1p1[8], 104(Lbasep1)
vmudl v1, vdum, vconsts[RSHFT]
vmadl v1, vdum2, vconsts[RSHFT]
vmudl v0, v0, vconsts[RSHFT]
vmadl v0, v0h, vconsts[RSHFT]
vmudl v1h, vdum3, vconsts[RSHFT]
vmadl v1h, vdum4, vconsts[RSHFT]
vand vdum3, t2, vconsts[HI_MASK]
vand vdum4, t2p1, vconsts[HI_MASK]
vand v1, v1, vconsts[HI_MASK]
vand v1h, v0h, vconsts[HI_MASK]
vmudl v2, vdum, vconsts[RSHFT]
vmadl v2, vdum2, vconsts[RSHFT]
vmudl v1, v1, vconsts[RSHFT]
vmadl v1, v1h, vconsts[RSHFT]
vmudl v2h, vdum3, vconsts[RSHFT]
vmadl v2h, vdum4, vconsts[RSHFT]
vand vdum, t1, vconsts[HI_MASK]
vand vdum2, t1p1, vconsts[HI_MASK]
vand v2, v2, vconsts[HI_MASK]
vand v2h, v2h, vconsts[HI_MASK]
vmudl v3, vdum, vconsts[RSHFT]
vmadl v3, vdum2, vconsts[RSHFT]
vmudl v2, v2, vconsts[RSHFT]
vmadl v2, v2h, vconsts[RSHFT]
vmudl v3h, vdum3, vconsts[RSHFT]
vmadl v3h, vdum4, vconsts[RSHFT]
vand v3, v3, vconsts[HI_MASK]
vand v3h, v3h, vconsts[HI_MASK]
vmudl v3, v3, vconsts[RSHFT]
vmadl v3, v3h, vconsts[RSHFT]
/*
vand vdum, t1, vconsts[HI4_MASK]
vand vdum2, t1p1, vconsts[HI4_MASK]
lqv t1[0], 32(xLbase)
vand vdum3, t2, vconsts[HI4_MASK]
lrv t1[0], 32(xRbase)
vand vdum4, t2p1, vconsts[HI4_MASK]
lqv t1p1[0], 32(Lbasep1)
vmudl v0, vdum, vconsts[R4SHFT]
lrv t1p1[0], 32(Rbasep1)
vmadl v0, vdum2, vconsts[R4SHFT]
lqv t2[0], 48(xLbase)
vmadl v0, vdum3, vconsts[R4SHFT]
lrv t2[0], 48(xRbase)
vmadl v0, vdum4, vconsts[R4SHFT]
lqv t2p1[0], 48(Lbasep1)
vand vdum, t1, vconsts[HI4_MASK]
lrv t2p1[0], 48(Rbasep1)
vand vdum2, t1p1, vconsts[HI4_MASK]
lqv t1[0], 64(xLbase)
vmudl v1, vdum3, vconsts[R4SHFT]
lrv t1[0], 64(xRbase)
vmadl v1, vdum4, vconsts[R4SHFT]
lqv t1p1[0], 64(Lbasep1)
vmadl v1, vdum, vconsts[R4SHFT]
lrv t1p1[0], 64(Rbasep1)
vmadl v1, vdum2, vconsts[R4SHFT]
vand vdum3, t2, vconsts[HI4_MASK]
vand vdum4, t2p1, vconsts[HI4_MASK]
vmudl v2, vdum, vconsts[R4SHFT]
vmadl v2, vdum2, vconsts[R4SHFT]
vmadl v2, vdum3, vconsts[R4SHFT]
vmadl v2, vdum4, vconsts[R4SHFT]
vand vdum, t1, vconsts[HI4_MASK]
vand vdum2, t1p1, vconsts[HI4_MASK]
vmudl v3, vdum3, vconsts[R4SHFT]
vmadl v3, vdum4, vconsts[R4SHFT]
vmadl v3, vdum, vconsts[R4SHFT]
vmadl v3, vdum2, vconsts[R4SHFT]
*/
#else
vmudl vdum, t1, vconsts[HI_BYTE]
vmadl vdum, t1p1, vconsts[HI_BYTE]
vmadl vdum, t2, vconsts[HI_BYTE]
vmadl vdum, t2p1, vconsts[HI_BYTE]
vand vdum2, t1, vconsts[LO_BYTE]
vand vdum3, t1p1, vconsts[LO_BYTE]
ldv t1[0], 48(xLbase)
vand vdum4, t2, vconsts[LO_BYTE]
ldv t1[8], 56(xLbase)
vmulf hi_res, vdum, vconsts[DIV4]
ldv t1p1[0], 48(Lbasep1)
vand vdum, t2p1, vconsts[LO_BYTE]
ldv t1p1[8], 56(Lbasep1)
vmulf vdum2, vdum2, vconsts[DIV4]
vmacf vdum2, vdum3, vconsts[DIV4]
vmacf vdum2, vdum4, vconsts[DIV4]
vmacf lo_res, vdum, vconsts[DIV4]
vmudn v0, hi_res, vconsts[HI_BYTE]
vmudl vdum, t2, vconsts[HI_BYTE]
vmadl vdum, t2p1, vconsts[HI_BYTE]
vmadl vdum, t1, vconsts[HI_BYTE]
vmadl vdum, t1p1, vconsts[HI_BYTE]
vadd v0, v0, lo_res
vand vdum2, t2, vconsts[LO_BYTE]
vand vdum3, t2p1, vconsts[LO_BYTE]
ldv t2[0], 72(xLbase)
vand vdum4, t1, vconsts[LO_BYTE]
ldv t2[8], 80(xLbase)
vmulf hi_res, vdum, vconsts[DIV4]
ldv t2p1[0], 72(Lbasep1)
vand vdum, t1p1, vconsts[LO_BYTE]
ldv t2p1[8], 80(Lbasep1)
vmulf vdum2, vdum2, vconsts[DIV4]
vmacf vdum2, vdum3, vconsts[DIV4]
vmacf vdum2, vdum4, vconsts[DIV4]
vmacf lo_res, vdum, vconsts[DIV4]
vmudn v1, hi_res, vconsts[HI_BYTE]
vmudl vdum, t1, vconsts[HI_BYTE]
vmadl vdum, t1p1, vconsts[HI_BYTE]
vmadl vdum, t2, vconsts[HI_BYTE]
vmadl vdum, t2p1, vconsts[HI_BYTE]
vadd v1, v1, lo_res
vand vdum2, t1, vconsts[LO_BYTE]
vand vdum3, t1p1, vconsts[LO_BYTE]
ldv t1[0], 96(xLbase)
vand vdum4, t2, vconsts[LO_BYTE]
ldv t1[8], 104(xLbase)
vmulf hi_res, vdum, vconsts[DIV4]
ldv t1p1[0], 96(Lbasep1)
vand vdum, t2p1, vconsts[LO_BYTE]
ldv t1p1[8], 104(Lbasep1)
vmulf vdum2, vdum2, vconsts[DIV4]
vmacf vdum2, vdum3, vconsts[DIV4]
vmacf vdum2, vdum4, vconsts[DIV4]
vmacf lo_res, vdum, vconsts[DIV4]
vmudn v2, hi_res, vconsts[HI_BYTE]
vmudl vdum, t2, vconsts[HI_BYTE]
vmadl vdum, t2p1, vconsts[HI_BYTE]
vmadl vdum, t1, vconsts[HI_BYTE]
vmadl vdum, t1p1, vconsts[HI_BYTE]
vadd v2, v2, lo_res
vand vdum2, t2, vconsts[LO_BYTE]
vand vdum3, t2p1, vconsts[LO_BYTE]
vand vdum4, t1, vconsts[LO_BYTE]
vmulf hi_res, vdum, vconsts[DIV4]
vand vdum, t1p1, vconsts[LO_BYTE]
vmulf vdum2, vdum2, vconsts[DIV4]
vmacf vdum2, vdum3, vconsts[DIV4]
vmacf vdum2, vdum4, vconsts[DIV4]
vmacf lo_res, vdum, vconsts[DIV4]
vmudn v3, hi_res, vconsts[HI_BYTE]
vadd v3, v3, lo_res
#endif
j finish
addi Lbasep1, Lbasep1, 96
#include "mc_uname.h"