tm_ram.v
1.15 KB
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// tm_ram.v v1 Frank Berndt
// NEC .15um texture memories;
// :set tabstop=4
module tm_ram (
pcg, csb, a, di, web, dout
);
input pcg; // synchronous gated clock;
input csb; // chip enabled;
input [7:0] a; // address;
input [15:0] di; // write data;
input [1:0] web; // write enables;
output [15:0] dout; // read data;
// instantiate NEC SRAM;
// 256x16 with byte enables;
WBSRAMSHS256W16C3B8 ram (
.DO15(dout[15]),
.DO14(dout[14]),
.DO13(dout[13]),
.DO12(dout[12]),
.DO11(dout[11]),
.DO10(dout[10]),
.DO9(dout[9]),
.DO8(dout[8]),
.DO7(dout[7]),
.DO6(dout[6]),
.DO5(dout[5]),
.DO4(dout[4]),
.DO3(dout[3]),
.DO2(dout[2]),
.DO1(dout[1]),
.DO0(dout[0]),
.DI15(di[15]),
.DI14(di[14]),
.DI13(di[13]),
.DI12(di[12]),
.DI11(di[11]),
.DI10(di[10]),
.DI9(di[9]),
.DI8(di[8]),
.DI7(di[7]),
.DI6(di[6]),
.DI5(di[5]),
.DI4(di[4]),
.DI3(di[3]),
.DI2(di[2]),
.DI1(di[1]),
.DI0(di[0]),
.A7(a[7]),
.A6(a[6]),
.A5(a[5]),
.A4(a[4]),
.A3(a[3]),
.A2(a[2]),
.A1(a[1]),
.A0(a[0]),
.WEB1(web[1]),
.WEB0(web[0]),
.CSB(csb),
.BE(pcg),
.TBE(1'b0),
.TEST(1'b0),
.BUB(1'b1)
);
endmodule