// vu_buf.v v1 
// vu buffer wrapper;
// :set tabstop=4

module vu_buf (
	clk, 
	wea, 
	waa, 
	dina, 
	web, 
	wab, 
	dinb, 
	rac,
	rdc,
	rad,
	rdd,
	rae,
	rde
);

	input			clk;
	input			wea;		// write port a
	input	[4:0]	waa;
	input	[7:0]	dina;
	input			web;		// write port b
	input	[4:0]	wab;
	input	[7:0]	dinb;
	input	[4:0]	rac;		// read port c
	output	[7:0]	rdc;
	input	[4:0]	rad;		// read port d
	output	[7:0]	rdd;
	input	[4:0]	rae;		// read port e
	output	[7:0]	rde;

	wire	wea_b = ~wea;
	wire	web_b = ~web;

	WBSRAMMDWQR32W8C2 vubuf (
			.DOC0		(rdc[0]),
			.DOC1		(rdc[1]),
			.DOC2		(rdc[2]),
			.DOC3		(rdc[3]),
			.DOC4		(rdc[4]),
			.DOC5		(rdc[5]),
			.DOC6		(rdc[6]),
			.DOC7		(rdc[7]),
			.DOD0		(rdd[0]),
			.DOD1		(rdd[1]),
			.DOD2		(rdd[2]),
			.DOD3		(rdd[3]),
			.DOD4		(rdd[4]),
			.DOD5		(rdd[5]),
			.DOD6		(rdd[6]),
			.DOD7		(rdd[7]),
			.DOE0		(rde[0]),
			.DOE1		(rde[1]),
			.DOE2		(rde[2]),
			.DOE3		(rde[3]),
			.DOE4		(rde[4]),
			.DOE5		(rde[5]),
			.DOE6		(rde[6]),
			.DOE7		(rde[7]),
			.DOF0		(),
			.DOF1		(),
			.DOF2		(),
			.DOF3		(),
			.DOF4		(),
			.DOF5		(),
			.DOF6		(),
			.DOF7		(),
			.DIA0		(dina[0]),
			.DIA1		(dina[1]),
			.DIA2		(dina[2]),
			.DIA3		(dina[3]),
			.DIA4		(dina[4]),
			.DIA5		(dina[5]),
			.DIA6		(dina[6]),
			.DIA7		(dina[7]),
			.AA0		(waa[0]),
			.AA1		(waa[1]),
			.AA2		(waa[2]),
			.AA3		(waa[3]),
			.AA4		(waa[4]),
			.BEA		(clk),
			.TBEA		(1'b0),
			.WEA		(wea_b),
			.DIB0		(dinb[0]),
			.DIB1		(dinb[1]),
			.DIB2		(dinb[2]),
			.DIB3		(dinb[3]),
			.DIB4		(dinb[4]),
			.DIB5		(dinb[5]),
			.DIB6		(dinb[6]),
			.DIB7		(dinb[7]),
			.AB0		(wab[0]),
			.AB1		(wab[1]),
			.AB2		(wab[2]),
			.AB3		(wab[3]),
			.AB4		(wab[4]),
			.BEB		(clk),
			.TBEB		(1'b0),
			.WEB		(web_b),
			.AC0		(rac[0]),
			.AC1		(rac[1]),
			.AC2		(rac[2]),
			.AC3		(rac[3]),
			.AC4		(rac[4]),
			.BEC		(clk),
			.TBEC		(1'b0),
			.AD0		(rad[0]),
			.AD1		(rad[1]),
			.AD2		(rad[2]),
			.AD3		(rad[3]),
			.AD4		(rad[4]),
			.BED		(clk),
			.TBED		(1'b0),
			.AE0		(rae[0]),
			.AE1		(rae[1]),
			.AE2		(rae[2]),
			.AE3		(rae[3]),
			.AE4		(rae[4]),
			.BEE		(clk),
			.TBEE		(1'b0),
			.AF0		(1'b0),
			.AF1		(1'b0),
			.AF2		(1'b0),
			.AF3		(1'b0),
			.AF4		(1'b0),
			.BEF		(clk),
			.TBEF		(1'b0),
			.TEST		(1'b0)
			);

endmodule