vusb_otg_lpbck.v
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/*******************************************************************************
-- File Type: Verilog HDL
-- Tool Version: VHDL2verilog v4.4 Tue Sep 19 10:06:32 EDT 2000 SunOS 5.5.1
-- Input file was: vusb_otg_lpbck
-- Date Created: Tue Jul 16 14:01:18 2002
*******************************************************************************/
`timescale 1 ns / 1 ps // timescale for following modules
// ----------------------------------------------------------------------------
// Copyright 2002 ARC International Nashua NH USA. All rights reserved.
// This software is provided under license and contains proprietary
// and confidential material which is the property of VAutomation Inc.
// HTTP://www.ARC.com
// ----------------------------------------------------------------------------
// File Name: $Workfile: vusb_otg_lpbck.vhdl$
// Revision: $Revision: 1.1.1.1 $
// Description:
// vusb_otg_lpbck
//
// This module provides loopback testing for the USB On-The-Go signals.
// -----------------------------------------------------------------------------
// This product is licensed to:
// John Princen of RouteFree
// for use at site(s):
// broadon
// -----------Revision History--------------------------------------------------
// $Log:
// 3 VUSB 1.2 4/12/02 2:38:37 PM Tom Frechette First
// round of OTG Debug -- working.
// 2 VUSB 1.1 4/12/02 10:43:48 AM Tom Frechette Debugging
// otg
// 1 VUSB 1.0 4/12/02 7:07:26 AM Tom Frechette
// $
// $NoKeywords$
// -----------------------------------------------------------------------------
// ------------------------------------------------------------------------------
// Copyright 1995 VAutomation Inc. Nashua NH (603)882-2282 ALL RIGHTS RESERVED.
// This software is provided under license and contains proprietary and
// confidential material which is the property of VAutomation Inc.
//
// File: vusb_cfg.vhd USB Configuration file.
//
// Revision: $Revision: 1.1.1.1 $
//
// Description: A Package file for the usb core that defines global usb constants
// that contol how the VUSB core is synthesised.
//
// ---------------------------------------------------------------------------
// This product is licensed to:
// $name$ of $company$
// for use at site(s):
// $site$
// ------------------------------------------------------------------------------
// Revision History
// $Log:
// 32 VUSB 1.31 7/5/02 9:15:50 AM Chris Kolb Moved
// VUSB build configruation Revision constant to vusb_cfg, and updated
// the rev number to 3.0.
// 31 VUSB 1.30 4/11/02 2:49:09 PM Patrick Koran all
// checked in from pats pc, week of Starteam upgrade 4.6 to 5.1
// 30 VUSB 1.29 3/18/02 10:52:11 AM Tom Frechette Changed
// IRQ_NUM default to 0x0.
// 29 VUSB 1.28 3/15/02 2:39:08 PM Tom Frechette Added
// Interupt info into add_info register.
// 28 VUSB 1.27 2/7/02 4:49:00 PM Tom Frechette Removed
// sync config variable.
// 27 VUSB 1.26 8/23/01 9:48:58 AM Tom Frechette
// 26 VUSB 1.25 7/25/01 3:41:35 PM Tom Frechette Changed
// FIFO Parameter Names.
// 25 VUSB 1.24 7/10/01 3:03:41 PM Tom Frechette Moved
// HOST comment for verilog.
// 24 VUSB 1.23 7/6/01 7:44:00 AM Tom Frechette Added
// host comments around host constant to make it look like vusb_sie.
// 23 VUSB 1.22 7/6/01 7:34:33 AM Tom Frechette Added
// device constant comment for ARC.
// 22 VUSB 1.21 7/3/01 4:42:08 PM Tom Frechette Changed
// mode to a constant in vusb_cfg.
// 21 VUSB 1.20 6/22/01 3:09:48 PM Tom Frechette Changed
// endpoint number.
// 20 VUSB 1.19 6/21/01 9:59:56 AM Tom Frechette Changed
// the name and added fifo constants
// 19 VUSB 1.18 6/21/01 9:51:24 AM Tom Frechette
// 18 VUSB 1.17 5/25/01 10:25:08 AM Monika Leary Set
// synchronous reset constant to '1'
// 17 VUSB 1.16 5/17/01 2:52:48 PM Monika Leary Added
// USE_SYNC_RESET constant
// 16 VUSB 1.15 12/14/00 8:42:11 AM Christopher Meyers RCS
// Keyword To StarTeam Keyword Translation
// 15 VUSB 1.14 12/13/00 7:58:39 PM Chris Kolb Removed
// the HOST_WITHOUT_HUB constant. This control is now a Endpt0 control
// register bit in up_int.vhd.
// 14 VUSB 1.13 12/13/00 7:58:31 PM Gregory Recupero Removed
// ^M's
// 13 VUSB 1.12 12/13/00 7:58:26 PM Mark Pettigrew
// ulogicified source - no functional changes
// 12 VUSB 1.11 12/13/00 7:58:19 PM Chris Kolb Change
// type of HOST_WITHOUT_HUB from std_logic to integer so that it could
// be used to initialize a _synopsysTM(TM) compatible generic.
// 11 VUSB 1.10 12/13/00 7:58:14 PM Chris Kolb Set
// constant to support Host to Low Speed device thru a hub.
// 10 VUSB 1.9 12/13/00 7:58:07 PM Chris Kolb Changed
// LOW_SPEED_DEV constant to type integer to support generics.
// 9 VUSB 1.8 12/13/00 7:57:58 PM Christopher Meyers
// removed ASIC_IMPLEMENTATION constant
// 8 VUSB 1.7 12/13/00 7:57:46 PM Chris Kolb Remove
// ^M's. No functional changes.
// 7 VUSB 1.6 12/13/00 7:57:39 PM Chris Kolb Added
// HOST_WITHOUT_HUB constant to support new code in the DPLLNRZI.
// 6 VUSB 1.5 12/13/00 7:57:19 PM Chris Kolb Turned
// host mode back on.
// 5 VUSB 1.4 12/13/00 7:57:12 PM Chris Kolb Reverted
// to device only implementation.
// 4 VUSB 1.3 12/13/00 7:57:08 PM Chris Kolb Added
// revision string.
// 3 VUSB 1.2 12/13/00 7:57:03 PM Chris Kolb Enabled
// implementation of embedded host functions.
// 2 VUSB 1.1 12/13/00 7:56:58 PM Chris Kolb Added
// IMPLEMENT_EMBEDED_HOST constant.
// 1 VUSB 1.0 12/13/00 7:56:51 PM Chris Kolb initial
// revision
// $
//
//
// ------------------------------------------------------------------------------
module vusb_otg_lpbck (usb_id,
usb_sess_vld_n,
usb_a_vbus_vld_n,
usb_b_sess_end_n,
usb_vbus_on_n,
usb_vbus_chg_n,
usb_vbus_dschg_n);
// file containing translation of VHDL package 'vusb_cfg'
output usb_id; // id pin from mini connectors
output usb_sess_vld_n; // "A" session valid
output usb_a_vbus_vld_n; // "A" VBUS valid
output usb_b_sess_end_n; // "B" session end
`include "vusb_cfg.v"
input usb_vbus_on_n; // turn on vbus
input usb_vbus_chg_n; // charge vbus
input usb_vbus_dschg_n;
wire usb_id;
wire usb_sess_vld_n;
wire usb_a_vbus_vld_n;
wire usb_b_sess_end_n;
wire usb_sess_vld;
wire usb_a_vbus_vld;
wire usb_b_sess_end;
// usb_id when vbus_on_n only
assign usb_id = ~usb_vbus_on_n & usb_vbus_chg_n;
// sess_vld when vbus_chg_n only
assign usb_sess_vld = usb_vbus_on_n & ~usb_vbus_chg_n;
// vbus _vld when vbus_dschg_n
assign usb_a_vbus_vld = ~usb_vbus_dschg_n;
// sess_end when both vbus_on_n and vbus_chg_n active
assign usb_b_sess_end = ~usb_vbus_on_n & ~usb_vbus_chg_n;
// signals are active low
assign usb_sess_vld_n = ~usb_sess_vld;
assign usb_b_sess_end_n = ~usb_b_sess_end;
assign usb_a_vbus_vld_n = ~usb_a_vbus_vld;
endmodule // module vusb_otg_lpbck