#!/bin/csh -f
#
# ASICSYN
#
vlsishell << EOF
set echo on
asicsyn

set autowrite false
set hdl verilog

#
# verilog sources
#
load [v]cc_lerp_csa_add12

synthesize

set maxdelay 14.0 * --> *
report
report longtiming
write

exit
exit
EOF
#