io_flash_OUT.tcl
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set_load -wire_load 25 [get_ports {PAD_IO_ALE}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_ale_reg/*}] \
-to [get_ports {PAD_IO_ALE}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_IOR}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_ior_reg/*}] \
-to [get_ports {PAD_IO_IOR}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_IOW}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_iow_reg/*}] \
-to [get_ports {PAD_IO_IOW}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_RST}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_rst_reg/*}] \
-to [get_ports {PAD_IO_RST}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_CS3}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_cs_reg_3_/*}] \
-to [get_ports {PAD_IO_CS3}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_CS2}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_cs_reg_2_/*}] \
-to [get_ports {PAD_IO_CS2}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_CS1}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_cs_reg_1_/*}] \
-to [get_ports {PAD_IO_CS1}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_CS0}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_cs_reg_0_/*}] \
-to [get_ports {PAD_IO_CS0}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD15}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_15_/*}] \
-to [get_ports {PAD_IO_AD15}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD14}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_14_/*}] \
-to [get_ports {PAD_IO_AD14}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD13}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_13_/*}] \
-to [get_ports {PAD_IO_AD13}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD12}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_12_/*}] \
-to [get_ports {PAD_IO_AD12}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD11}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_11_/*}] \
-to [get_ports {PAD_IO_AD11}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD10}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_10_/*}] \
-to [get_ports {PAD_IO_AD10}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD9}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_9_/*}] \
-to [get_ports {PAD_IO_AD9}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD8}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_8_/*}] \
-to [get_ports {PAD_IO_AD8}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD7}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_7_/*}] \
-to [get_ports {PAD_IO_AD7}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD6}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_6_/*}] \
-to [get_ports {PAD_IO_AD6}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD5}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_5_/*}] \
-to [get_ports {PAD_IO_AD5}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD4}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_4_/*}] \
-to [get_ports {PAD_IO_AD4}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD3}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_3_/*}] \
-to [get_ports {PAD_IO_AD3}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD2}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_2_/*}] \
-to [get_ports {PAD_IO_AD2}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD1}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_1_/*}] \
-to [get_ports {PAD_IO_AD1}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD0}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_out_reg_0_/*}] \
-to [get_ports {PAD_IO_AD0}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD15}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD15}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD14}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD14}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD13}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD13}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD12}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD12}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD11}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD11}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD10}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD10}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD9}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD9}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD8}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD8}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD7}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_1_/*}] \
-to [get_ports {PAD_IO_AD7}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD6}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD6}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD5}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD5}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD4}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD4}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD3}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD3}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD2}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD2}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD1}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD1}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_IO_AD0}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rio_oe_reg_0_/*}] \
-to [get_ports {PAD_IO_AD0}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_ALE}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_ale_reg/*}] \
-to [get_ports {PAD_FL_ALE}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_CLE}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_cle_reg/*}] \
-to [get_ports {PAD_FL_CLE}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_RE}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_re_reg/*}] \
-to [get_ports {PAD_FL_RE}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_WE}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_we_reg/*}] \
-to [get_ports {PAD_FL_WE}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_WP}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_wp_reg/*}] \
-to [get_ports {PAD_FL_WP}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_CE3}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_ce_reg_3_/*}] \
-to [get_ports {PAD_FL_CE3}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_CE2}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_ce_reg_2_/*}] \
-to [get_ports {PAD_FL_CE2}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_CE1}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_ce_reg_1_/*}] \
-to [get_ports {PAD_FL_CE1}] \
>> io_flash_OUT.rep
set_load -wire_load 25 [get_ports {PAD_FL_CE0}]
report_timing -max_paths 5 -nworst 1 \
-from [get_pins {rfl_ce_reg_0_/*}] \
-to [get_ports {PAD_FL_CE0}] \
>> io_flash_OUT.rep