rep.min.clock
2.68 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
****************************************
Report : clock
Design : bb
Version: 2001.08-SP1
Date : Wed Mar 5 23:36:48 2003
****************************************
Attributes:
p - propagated_clock
G - Generated clock
Clock Period Waveform Attrs Sources
--------------------------------------------------------------------------------
BBSTB 4.90 {3.5 5.95} p {PAD_MDQS0 PAD_MDQS1 PAD_MDQS2 PAD_MDQS3}
BBSTB_N 4.90 {5.95 8.4} {}
BBSTB_P 4.90 {3.5 5.95} {}
DBGCLK 19.60 {0 9.8} p {dbgclk_tree/N01}
DDRCLK 4.90 {2.45 4.9} {}
JTAGCLK 39.20 {0 19.6} p {tck_tree/N01}
MEMCLK 4.90 {-0.716 1.734} p {pllx2/CLKOA}
SYSCLK 9.80 {-1.149 3.751} p {PAD_SYSCLK}
USBCLK 19.60 {-1.667 8.133} p {PAD_USBCLKI}
VCLOCK 19.60 {-1.171 8.629} p {pllv/FO}
1
****************************************
Report : clock_skew
Design : bb
Version: 2001.08-SP1
Date : Wed Mar 5 23:36:48 2003
****************************************
Min Rise Min Fall Max Rise Max Fall Hold Setup
Object Delay Delay Delay Delay Uncertainty Uncertainty
--------------------------------------------------------------------------------
SYSCLK - - - - 0.10 0.10
MEMCLK - - - - 0.10 0.10
DDRCLK 0.00 0.00 0.00 0.00 0.25 0.25
BBSTB - - - - 0.50 0.50
USBCLK - - - - 0.10 0.10
DBGCLK - - - - 0.10 0.10
JTAGCLK - - - - 0.10 0.10
Min Condition Source Latency Max Condition Source Latency
--------------------------------------------------------------------------------
Object Early_r Early_f Late_r Late_f Early_r Early_f Late_r Late_f
--------------------------------------------------------------------------------
MEMCLK 0.898 0.898 0.898 0.898 0.898 0.898 0.898 0.898
From To Hold Setup
Object Object Uncertainty Uncertainty
--------------------------------------------------------------------------------
MEMCLK SYSCLK 0.30 0.30
SYSCLK MEMCLK 0.30 0.30
1