Makefile
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#!smake -J 5
PRDEPTH = ../../../../..
include $(PRDEPTH)/PRdefs
#
# Directories
#
HW = hw2
TCTM = ../..
INDATA = ../../InData
RTLOPTS = -y ../../fixture/src \
-y $(PRDEPTH)/$(HW)/chip/rcp/tc/src \
-y $(PRDEPTH)/$(HW)/chip/rcp/tm/src \
-y $(PRDEPTH)/$(HW)/chip/lib/verilog/stdcell \
-y $(PRDEPTH)/$(HW)/chip/lib/verilog/ram \
+libext+.v+.vzd \
+incdir+$(PRDEPTH)/$(HW)/chip/rcp/inc
SYNOPTS = -y ../../fixture/src \
-y $(PRDEPTH)/$(HW)/chip/rcp/tc/syn \
-y $(PRDEPTH)/$(HW)/chip/rcp/tm/syn \
-y $(PRDEPTH)/$(HW)/chip/lib/verilog/stdcell \
-y $(PRDEPTH)/$(HW)/chip/lib/verilog/ram \
+libext+.v+.vzd+.vsyn
TC_ADJ017_SYN = LD_LIBRARY_PATH=$(VCSDIR)/lib tc_adj017_syn
LDIRT = driver*.v *.mem *.out vcs.log *.dump $(TMPDIR)/$(USER)_tc_adj017 $(TMPDIR)/$(USER)_tc_adj017_syn *.tab simv*
RTESTS = tc_adj017
STESTS = tc_adj017_syn
FAST = fast017
ERROR = \
@if grep "ERROR IN SIMULATION" FILE ; \
then \
echo ""; \
else \
echo "NO ERRORS IN SIMULATION"; \
fi
default: $(RTESTS)
stests: $(STESTS)
include $(PRDEPTH)/PRrules
.mem.out:
$(RTESTS): simv017
$(STESTS): simv017_syn
tc_adj017.tab: $(TCTM)/tctm $(INDATA)/inp015.tab $(INDATA)/inp007.tab $@.base.Z
(cd ../..; make test017)
/usr/bsd/uncompress $@.base.Z
cmp $@ $@.base
/usr/bsd/compress $@.base
driver017.v: tc_adj017.tab $(TAB2VMEM)
$(TAB2VMEM) -o /dev/null -s 100 tc_adj017.tab > driver017.v
simv017: top_level.v driver017.v tc_adj017.mem $(_FORCE)
$(VCS) $(VCSOPTS) $(RTLOPTS) -o $@ -Mdir="$(TMPDIR)/$(USER)_tc_adj017" top_level.v driver017.v
@ if [ "$(DUMP)" ]; \
then (echo "simv017 +mem=tc_adj017.mem > simv017.out"; simv017 -vcd verilog017.dump +mem=tc_adj017.mem > simv017.out;) \
else \
(echo "simv017 +mem=tc_adj017.mem > simv017.out"; simv017 +mem=tc_adj017.mem +vcs+dumpvarsoff > simv017.out;) \
fi
$(ERROR:FILE=simv017.out)
$(LOG_ERROR)
simv017_syn: top_level.vsyn driver017.v tc_adj017.mem $(_FORCE)
VCS_RUNTIME=$(VCSDIR)/lib/libvcs.so \
$(VCS) $(VCSOPTS) $(SYNOPTS) \
-o $@ -Mdir="$(TMPDIR)/$(USER)_tc_adj017_syn" \
top_level.vsyn driver017.v
@ if [ "$(DUMP)" ]; \
then \
(LD_LIBRARY_PATH=$(VCSDIR)/lib echo "$@ +mem=tc_adj017.mem > $@.out"; $@ -vcd verilog017_syn.dump +mem=tc_adj017.mem > $@.out;) \
else \
(LD_LIBRARY_PATH=$(VCSDIR)/lib echo "$@ +mem=tc_adj017.mem > $@.out"; $@ +mem=tc_adj017.mem +vcs+dumpvarsoff > $@.out;) \
fi
$(ERROR:FILE=simv017_syn.out)
$(LOG_ERROR)
fast: $(FAST)
fast017: tc_adj017.mem
simv017 +mem=$? | tee $*.out