/*************************************************************************
 *                                                                       *
 *               Copyright (C) 1994, Silicon Graphics, Inc.              *
 *                                                                       *
 *  These coded instructions, statements, and computer programs  contain *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and *
 *  are protected by Federal copyright  law.  They  may not be disclosed *
 *  to  third  parties  or copied or duplicated in any form, in whole or *
 *  in part, without the prior written consent of Silicon Graphics, Inc. *
 *                                                                       *
 ************************************************************************/
	
/* adpcm.s */

.name	header_base,	$23
.name	dm_in,		$22
.name	count,		$21
.name	state_addr,	$20
.name	static_base,	$19
.name	coef_base,	$18
.name	scalei,		$17
.name	coef_index,	$16
.name	ncoef_index,	$15
.name	tindex,		$14
.name	ssize,		$3
.name   dm_out,		$1

.name	vconst,		$v31
.name	idata0,	 	$v30
.name 	idata1, 	$v29
.name 	odata0,		$v28
.name 	odata1,		$v27
.name	odataf,		$v26
.name	imask1,		$v25
.name	imask2,		$v24
.name	iscale1,	$v23
.name	vscale,		$v22
.name	col0,		$v21
.name	col1,		$v20
.name	col2,		$v19
.name	col3,		$v18
.name	col4,		$v17
.name	col5,		$v16
.name	col6,		$v15
.name	col7,		$v14
.name	col8,		$v13

case_A_ADPCM:
	lqv	vconst[0], AL_CONST_C_SHIFT(zero)
	srl	header_base, aud1, 12
				vxor	imask1, imask1, imask1
	andi	header_base, header_base, 0x000f
				vxor	imask2, imask2, imask2
	addi	header_base, header_base, AL_ADPCM_IN
				vxor	col8, col8, col8
	andi	dm_out, aud1, 0x0fff
				vxor	col7, col7, col7
	addi	dm_out, dm_out, RSP_BUFFER_OFFSET
				vxor	col6, col6, col6
	srl	count, aud1, 16
				vxor	col5, col5, col5
	andi	count, count, 0x0fff
				vxor	col4, col4, col4
	sll	state_addr, aud0, 8
				vxor	col3, col3, col3
	srl	state_addr, state_addr, 8
				vxor	col2, col2, col2

.name	tmp0,	$13
.name	tmp1,	$2

	addi	ssize, zero, ADPCM_STATE_SIZE
	srl	tmp0, aud1, 28
	andi	tmp1, tmp0, A_INIT
	bgtz	tmp1, ADPCMno_load
	addi	dm_in, header_base, 1
	andi	tmp1, tmp0, A_LOOP
	beq	tmp1, zero, ADPCMload
	addi	tmp1, state_addr, 0

	lw	tmp1, AL_ADPCM_PARAMETER_LSTATE(zero)
	
ADPCMload:		
	mfc0	tmp0, SP_RESERVED
adpcmDMAreadwait:
	bne	tmp0, $0, adpcmDMAreadwait
	mfc0	tmp0, SP_RESERVED

	mfc0	tmp0, DMA_FULL
adpcmDRFull1:
	bne	tmp0, $0, adpcmDRFull1
	mfc0	tmp0, DMA_FULL

	mtc0	dm_out, DMA_CACHE
	mtc0	tmp1, DMA_DRAM
	mtc0	ssize, DMA_READ_LENGTH
	
	addi	static_base, zero, DEC_MASK_OFFSET
	addi	coef_base, zero, RSP_ADPCMTABLE_OFFSET
	ldv	imask1[0], 0(static_base)
	ldv	imask2[8], 0(static_base)
	ldv	iscale1[0], 8(static_base)
	ldv	iscale1[8], 8(static_base)

	mfc0	$5, DMA_BUSY
ADPCMwait1:	
	bne	$5, zero, ADPCMwait1
	mfc0	$5, DMA_BUSY

	mtc0	$0, SP_RESERVED

	j	ADPCMafter_load
	lqv	odata1[0], 16(dm_out) 

.unname	tmp0
.unname	tmp1

ADPCMno_load:
	addi	static_base, zero, DEC_MASK_OFFSET
				vxor	odata1, odata1, odata1
	addi	coef_base, zero, RSP_ADPCMTABLE_OFFSET
	ldv	imask1[0], 0(static_base)
	ldv	imask2[8], 0(static_base)
	ldv	iscale1[0], 8(static_base)
	ldv	iscale1[8], 8(static_base)
	sqv	odata1[0], 0(dm_out)
	sqv	odata1[0], 16(dm_out)

ADPCMafter_load:
	beq	count, zero, ADPCMdone	
	addi	dm_out, dm_out, 32

.name	bitdata,	$v12
.name	vtmp0, 		$v11
.name	vtmp1,		$v10
.name	vtmp2, 		$v9
.name	vtmp3,		$v8
.name	vtmp4,		$v7
.name   vtmp5,		$v6

.name	tmp1,		$13
.name	tmp2,		$12
.name	scale,		$11
.name	headr,		$10

	ldv	bitdata[0], 0(dm_in)
	lbu	headr, 0(header_base)
	addi    tmp1, zero, 12
	addi    tmp2, zero, 1	
	andi	tindex, headr, 0x0f
	sll	tindex, tindex, 5
					vand	vtmp1, imask1, bitdata[0]
	add	coef_index, tindex, coef_base
					vand	vtmp2, imask2, bitdata[1]
	srl	scalei, headr, 4
					vand	vtmp3, imask1, bitdata[2]
	sub     scalei, tmp1, scalei
					vand	vtmp4, imask2, bitdata[3]
	addi	tmp1, scalei, -1
  	sll	tmp2, tmp2, 15
	srlv	scale, tmp2, tmp1
	mtc2	scale, vscale

	lqv	col0[0], 0(coef_index)
	lqv	col1[0], 16(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col2[0], 32(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col3[0], 32(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col4[0], 32(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col5[0], 32(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col6[0], 32(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col7[0], 32(coef_index)
	addi	coef_index, coef_index,-2
	lrv	col8[0], 32(coef_index)

ADPCMfloop:
	addi	dm_in, dm_in, 9
					vmudn	idata0, vtmp1, iscale1
	addi	header_base, header_base, 9	
					vmadn	idata0, vtmp2, iscale1
	lbu	headr, 0(header_base)
					vmudn	idata1, vtmp3, iscale1 
	ldv	bitdata[0], 0(dm_in)
					vmadn	idata1, vtmp4, iscale1
	addi	tmp1, zero, 12
	blez	scalei, ADPCMnoscale
	andi	tindex, headr, 0x0f
					vmudm	idata0, idata0, vscale[0]
					vmudm	idata1, idata1, vscale[0]

ADPCMnoscale:
	sll	tindex, tindex, 5
					vmudh	vtmp0, col0, odata1[6]
	add	coef_index, tindex, coef_base
					vmadh	vtmp0, col1, odata1[7]
					vmadh	vtmp0, col2, idata0[0]
					vmadh	vtmp0, col3, idata0[1]
	srl	scalei, headr, 4
					vmadh	vtmp0, col4, idata0[2]
					vmadh	vtmp0, col5, idata0[3]
	sub	scalei, tmp1, scalei
					vmadh	odata0, col6, idata0[4]
	addi	tmp1, scalei, -1
					vmadh	vtmp0, col7, idata0[5]
					vmadh	vtmp0, col8, idata0[6]
					vmadh	vtmp0, idata0, vconst[3]
	srlv	scale, tmp2, tmp1
					vsaw	odataf, vtmp5, odata0[1]
	mtc2	scale, vscale
					vsaw	odata0, vtmp5, odata0[0]

					vand	vtmp1, imask1, bitdata[0]
					vand	vtmp2, imask2, bitdata[1]
					vand	vtmp3, imask1, bitdata[2]
					vand	vtmp4, imask2, bitdata[3]	

					vmudn	vtmp0, odataf, vconst[1]
					vmadh	odata0, odata0, vconst[1]

					vmudh	vtmp0, col2, idata1[0]
	addi	ncoef_index, coef_index,-2
					vmadh	vtmp0, col3, idata1[1]
	lrv	col2[0], 32(ncoef_index)
					vmadh	vtmp0, col4, idata1[2]
	addi	ncoef_index, ncoef_index,-2
					vmadh	vtmp0, col5, idata1[3]
	lrv	col3[0], 32(ncoef_index)
					vmadh	vtmp0, col6, idata1[4]
	addi	ncoef_index, ncoef_index,-2
					vmadh	vtmp0, col7, idata1[5]
	lrv	col4[0], 32(ncoef_index)
					vmadh	vtmp0, col8, idata1[6]
	addi	ncoef_index, ncoef_index,-2
					vmadh	vtmp0, idata1, vconst[3]
	lrv	col5[0], 32(ncoef_index)
					vmadh	vtmp0, col0, odata0[6]
	addi	ncoef_index, ncoef_index,-2
					vmadh	vtmp0, col1, odata0[7]
	lrv	col6[0], 32(ncoef_index)
					vsaw	odataf, vtmp5, odata1[1]
	addi	ncoef_index, ncoef_index,-2
					vsaw	odata1, vtmp5, odata1[0]
	lrv	col7[0], 32(ncoef_index)
	addi	ncoef_index, ncoef_index,-2
	lrv	col8[0], 32(ncoef_index)
	lqv	col0[0], 0(coef_index)
	
					vmudn	vtmp0, odataf, vconst[1]
	lqv	col1[0], 16(coef_index)
					vmadh	odata1, odata1, vconst[1]

	addi	count, count, -32
	sqv	odata0[0], 0(dm_out)
	addi	dm_out, dm_out, 32
	bgtz	count, ADPCMfloop
	sqv	odata1[0], -16(dm_out)

.unname	bitdata
.unname	vtmp0
.unname	vtmp1
.unname	vtmp2
.unname	vtmp3
.unname	vtmp4
.unname	vtmp5

.unname	tmp1
.unname	tmp2
.unname scale
.unname	headr
	
.name	tmp1,	$2

ADPCMdone:
	addi	dm_out, dm_out, -32
	jal	DMAwrite
	addi	tmp1, state_addr, 0

	addi	dlcount, dlcount, -8

	mfc0	$5, DMA_BUSY
ADPCMwait2:
	bne	$5, zero, ADPCMwait2
	mfc0	$5, DMA_BUSY

	j	AudDone
	mtc0	$0, SP_RESERVED

.unname tmp1

.unname	header_base
.unname	dm_in
.unname	count
.unname	state_addr
.unname	static_base
.unname	coef_base
.unname	scalei
.unname	coef_index
.unname	ncoef_index
.unname	tindex
.unname	ssize
.unname dm_out

.unname vconst
.unname	idata0
.unname idata1
.unname odata0
.unname odata1
.unname	odataf
.unname	imask1
.unname	imask2
.unname	iscale1
.unname	vscale
.unname	col0
.unname	col1
.unname	col2
.unname	col3
.unname	col4
.unname	col5
.unname	col6
.unname	col7
.unname	col8