machine_params.h
9.76 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
/*
* Copyright (C) 1996-1998 by the Board of Trustees
* of Leland Stanford Junior University.
*
* This file is part of the SimOS distribution.
* See LICENSE file for terms of the license.
*
*/
/*****************************************************************
* machine_params.h
*
* $Author: blythe $
* $Date: 2002/05/29 01:09:09 $
*****************************************************************/
#ifndef MACHINE_PARAMS_H
#define MACHINE_PARAMS_H
#include "tcl_init.h"
#include "syslimits.h"
#define MAX_PARAM_STRING_LENGTH 128
#define MAX_MACHINES 16
/* Per-machine data structure */
typedef struct MachineSpecificStruct {
/* CPU */
int NumCPUs;
int FirstCPU; /* number of this machines first CPU out of all CPUs */
int LastCPU; /* number of this machines last CPU out of all CPUs */
int NumCells;
int CPUsPerCell;
int log2CPUsPerCell;
/* MEMSYS */
int MemSizeSpecified;
int NumMemories;
int FirstMemory;
int LastMemory;
/* DISK */
char *DiskModel;
int HPDiskScaling;
int FixedDiskDelay;
int NumUnitsPerController;
int NumDiskCtrls[SIM_MAXCPUS];
/* CONSOLE */
int NumConsoles;
int FirstConsole;
int LastConsole;
/* ETHERNET */
int NumEtherControllers;
int FirstEtherController;
int LastEtherController;
/* CLOCK */
int NumClocks;
int FirstClock;
int LastClock;
/* Derived fields:
These aren't set directly by the user but are derived from the above */
int MemSize;
/* Base address of this machine's simulated memory */
MA SimMemAddr;
} MachineSpecificStruct;
/* All-machine data structure */
typedef struct MachinesStruct {
/* Per Machine Settings */
MachineSpecificStruct machine[MAX_MACHINES];
/* All Machines Settings */
/* Machines */
int NumMachines;
/* CPU */
char *CpuModel;
char *CpuISA;
int TotalCPUs;
int MaxCPUsPerMachine; /* Number of CPUs on machine with the most */
int CpuClock;
/* TLB */
char *TlbOrg;
/* CACHE */
char *CacheModel;
int ICacheSizeSpecified;
int ICacheAssoc;
int ICacheLineSize;
int ICacheInclusion;
int DCacheSizeSpecified;
int DCacheAssoc;
int DCacheLineSize;
int SCacheSizeSpecified;
int SCacheLineSize;
int SCacheAssoc;
int SCacheHitTimeSpecified;
int WriteBufferSize;
int UpgradesOnUP;
int NAKRetryTime;
/* MEMSYS */
char *MemSysModel;
int TotalMemories;
/* Perfect */
int PerfectMemLatencySpecified;
/* BusUma */
int MemCycleTimeSpecified;
int UpgradeTimeSpecified;
int DirtyPenaltySpecified;
int BusBW;
/* MAGIC */
int SIPSLatencySpecified;
int IPILatencySpecified;
int InitialTimeSpecified;
/* Numa */
int NumaBusTimeSpecified;
int NumaPILocalDCTimeSpecified;
int NumaPIRemoteDCTimeSpecified;
int NumaNILocalDCTimeSpecified;
int NumaNIRemoteDCTimeSpecified;
int NumaMemTimeSpecified;
int NumaNetTimeSpecified;
int NumaStripeSize;
/* CONSOLE */
char *ConsoleModel;
int TotalConsoles;
int MaxConsolesPerMachine; /* Number of consoles on machine with the most */
/* ETHERNET */
char *EthernetModel;
int TotalEtherControllers;
int MaxEtherControllersPerMachine;
/* CLOCK */
int TotalClocks;
int MaxClocksPerMachine;
int IntrClockFrequency;
/* FPROM */
int FPROMSize;
int FRAMSize;
/* Derived fields:
These aren't set directly by the user but are derived from the above */
int DCacheSize;
int ICacheSize;
int SCacheSize;
int log2ICacheLineSize;
int log2ICacheSize;
int log2ICacheAssoc;
int iCacheIndex;
int log2DCacheLineSize;
int log2DCacheSize;
int log2DCacheAssoc;
int dCacheIndex;
int log2SCacheSize;
int log2SCacheLineSize;
int log2SCacheAssoc;
int sCacheIndex;
int MemCycleTime;
int PerfectMemLatency;
int UpgradeTime;
int DirtyPenalty;
int SCacheHitTime;
int SIPSLatency;
int IPILatency;
int InitialTime;
int NumaBusTime;
int NumaPILocalDCTime;
int NumaPIRemoteDCTime;
int NumaNILocalDCTime;
int NumaNIRemoteDCTime;
int NumaMemTime;
int NumaNetTime;
} MachinesStruct;
/* Per-machine macros */
#define NUM_CPUS(_m) machines.machine[_m].NumCPUs
#define FIRST_CPU(_m) machines.machine[_m].FirstCPU
#define LAST_CPU(_m) machines.machine[_m].LastCPU
#define NUM_CELLS(_m) machines.machine[_m].NumCells
#define CPUS_PER_CELL(_m) machines.machine[_m].CPUsPerCell
#define log2CPUS_PER_CELL(_m) machines.machine[_m].log2CPUsPerCell
#define MEM_SIZE(_m) machines.machine[_m].MemSize
#define MEM_SIZE_SPECIFIED(_m) machines.machine[_m].MemSizeSpecified
#define NUM_MEMORIES(_m) machines.machine[_m].NumMemories
#define FIRST_MEMORY(_m) machines.machine[_m].FirstMemory
#define LAST_MEMORY(_m) machines.machine[_m].LastMemory
#define DISK_MODEL(_m) machines.machine[_m].DiskModel
#define HP_DISK_SCALING(_m) machines.machine[_m].HPDiskScaling
#define FIXED_DISK_DELAY(_m) machines.machine[_m].FixedDiskDelay
#define NUM_DISK_CONTROLLERS(_m,_n) machines.machine[_m].NumDiskCtrls[_n]
#define NUM_UNITS_PER_CONTROLLER(_m) machines.machine[_m].NumUnitsPerController
#define NUM_CONSOLES(_m) machines.machine[_m].NumConsoles
#define FIRST_CONSOLE(_m) machines.machine[_m].FirstConsole
#define LAST_CONSOLE(_m) machines.machine[_m].LastConsole
#define NUM_ETHER_CONTROLLERS(_m) machines.machine[_m].NumEtherControllers
#define FIRST_ETHER_CONTROLLER(_m) machines.machine[_m].FirstEtherController
#define LAST_ETHER_CONTROLLER(_m) machines.machine[_m].LastEtherController
#define NUM_CLOCKS(_m) machines.machine[_m].NumClocks
#define FIRST_CLOCK(_m) machines.machine[_m].FirstClock
#define LAST_CLOCK(_m) machines.machine[_m].LastClock
/* Base of simulated memory */
#define SIM_MEM_ADDR(_m) machines.machine[_m].SimMemAddr
/* All-machine macros */
#define NUM_MACHINES machines.NumMachines
#define TOTAL_CPUS machines.TotalCPUs
#define TOTAL_MEMORIES machines.TotalMemories
#define TOTAL_CONSOLES machines.TotalConsoles
#define TOTAL_ETHER_CONTROLLERS machines.TotalEtherControllers
#define TOTAL_CLOCKS machines.TotalClocks
#define MAX_CPUS_PER_MACHINE machines.MaxCPUsPerMachine
#define MAX_CONSOLES_PER_MACHINE machines.MaxConsolesPerMachine
#define MAX_ETHER_CONTROLLERS_PER_MACHINE machines.MaxEtherControllersPerMachine
#define MAX_CLOCKS_PER_MACHINE machines.MaxClocksPerMachine
/*
* DISCO compatibility note:
* For compatibility with older DISCO checkpoints, we allow more
* disk controller-carrying nodes than actual processing nodes. This
* is a HACK and should be removed. Just drop the following #define
* and uncomment the one below.
*/
#define DISK_NODES SIM_MAXCPUS
/* #define DISK_NODES TOTAL_CPUS */
#define CPU_CLOCK machines.CpuClock
#define BUS_BW machines.BusBW
#define PERFECTMEM_LATENCY machines.PerfectMemLatency
#define MEM_CYCLE_TIME machines.MemCycleTime
#define UPGRADE_TIME machines.UpgradeTime
#define DIRTY_PENALTY machines.DirtyPenalty
#define CACHE_MODEL machines.CacheModel
#define ICACHE_LINE_SIZE machines.ICacheLineSize
#define log2ICACHE_LINE_SIZE machines.log2ICacheLineSize
#define ICACHE_SIZE machines.ICacheSize
#define log2ICACHE_SIZE machines.log2ICacheSize
#define ICACHE_INDEX machines.iCacheIndex
#define ICACHE_INCLUSION machines.ICacheInclusion
#define DCACHE_LINE_SIZE machines.DCacheLineSize
#define log2DCACHE_LINE_SIZE machines.log2DCacheLineSize
#define DCACHE_SIZE machines.DCacheSize
#define log2DCACHE_SIZE machines.log2DCacheSize
#define DCACHE_INDEX machines.dCacheIndex
#define SCACHE_ASSOC machines.SCacheAssoc
#define log2SCACHE_ASSOC machines.log2SCacheAssoc
#define SCACHE_SIZE machines.SCacheSize
#define log2SCACHE_SIZE machines.log2SCacheSize
#define SCACHE_LINE_SIZE machines.SCacheLineSize
#define log2SCACHE_LINE_SIZE machines.log2SCacheLineSize
#define SCACHE_HIT_TIME machines.SCacheHitTime
#define SCACHE_INDEX machines.sCacheIndex
#define NAK_RETRY_TIME machines.NAKRetryTime
#define WRITE_BUFFER_SIZE machines.WriteBufferSize
#define IPI_LATENCY machines.IPILatency
#define SIPS_LATENCY machines.SIPSLatency
#define NUMA_BUS_TIME machines.NumaBusTime
#define NUMA_PILOCAL_DC_TIME machines.NumaPILocalDCTime
#define NUMA_PIREMOTE_DC_TIME machines.NumaPIRemoteDCTime
#define NUMA_NILOCAL_DC_TIME machines.NumaNILocalDCTime
#define NUMA_NIREMOTE_DC_TIME machines.NumaNIRemoteDCTime
#define NUMA_MEM_TIME machines.NumaMemTime
#define NUMA_NET_TIME machines.NumaNetTime
#define NUMA_STRIPE_SIZE machines.NumaStripeSize
#define MEMSYS_MODEL machines.MemSysModel
#define UPGRADES_ON_UP machines.UpgradesOnUP
#define FPROM_SIZE machines.FPROMSize
#define FRAM_SIZE machines.FRAMSize
#define INTRCLOCK_FREQUENCY machines.IntrClockFrequency
/* For compatibility when restoring version 3 MOOSE checkpoints */
#define MOOSE_MAXVMS 8
extern MachinesStruct machines;
extern void MachineInitialize(Tcl_Interp *);
extern void MachineSettingsComplete(void);
extern char *MachineAccess(ClientData clientData, Tcl_Interp *interp,
char *name1, char *name2, int flags);
/*
* Macros for mapping to machine or machine cpu from cpu number
*/
extern int* MachineFromCPU;
#define M_FROM_CPU(_cpu) (MachineFromCPU[(_cpu)])
#define MCPU_FROM_CPU(_cpu) (_cpu - FIRST_CPU(M_FROM_CPU(_cpu)))
#endif