#!/bin/csh -f
#
# CHIPCOMP
#
vlsishell << EOF
set echo on
utility chipcomp

load [nls]if_logic

floor
floor plan row
number of rows 70
routing area factor 0.5
operating frequency 65M
accept

load [flr]if_logic_conn_seeds
floor areas off
guidance off
floor property off
seed cell instances off
pad/conn seed on
net weight off
net width off
max capacitance off
ECO placement off
path delays off
clk net info off
accept

set up
initial placement v/h weight 1.5
initial placement optimize method high
improve vertical weight 3
improve horizontal weight 2
improve optimize on
add power strap on
accept

seed clock nets
add 1
(1, netname) clock
(1, frequency) 70M
(1, branchwidth) 8
accept


placeBK
placecel
improvCel
routecel

save
info

quit
exit
EOF
#