module = tm_tf

search_path = search_path + "../src" + "../../inc" + \
   "../../../lib/verilog/user" + "../../syn"

/* read the compiled rdp module netlists */

read -f edif tm_tf.edf_p
read -f edif ../../tf/syn/tf.edf
read -f edif ../../tm/syn/tm.edf

current_design = tm_tf

set_dont_touch tm_half

ungroup -flatten -all

link 

check_design > tm_tf.lint

/* standard reports & netlist */

include "report.dc"

write -f edif -o tm_tf.edf -hier tm_tf

quit