#!smake

PRDEPTH = ../../../../..
include $(PRDEPTH)/PRdefs

LVCSOPTS = -y $(PRDEPTH)/hw/chip/rcp/at/src               	\
	   -y $(PRDEPTH)/hw/chip/lib/verilog/sc			\
	   -v $(PRDEPTH)/hw/chip/lib/verilog/udp/compass_udps.v \
	    +libext+.v+.vzd					\
	    +incdir+$(PRDEPTH)/hw/chip/rcp/inc

LDIRT = driver.v at_all???.mem at_all???.out at_all???.tab fast???.out	\
	signalscan*  *.do vcs.log verilog.dump csrc

TESTS = at_all000 
FAST  = fast000 

default: $(TESTS)

include $(PRDEPTH)/PRrules
	
$(TESTS): simv

driver.v: at_all000.tab $(TAB2VMEM)
	$(TAB2VMEM) -o /dev/null -s 100 at_all000.tab > driver.v

simv: top_level.v driver.v $(_FORCE)
	$(VCS) $(VCSOPTS) top_level.v driver.v

fast: $(FAST)	

fast000: ew_all000.mem
	simv +mem=$? | tee $*.out