rsp_regr.h
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/************************************************
* Path definitions
************************************************/
`ifdef REALITY_RSP_REGRESSION
`define rsp_path reality.rcp_0.rsp_0
`else
`define rsp_path rspWrap.rsp
`endif
`define tr rsp_ctrace
`define SRpath `rsp_path.su.sudp.suRFile_i
`ifdef RSP_GATE
`define vu_path `rsp_path.vu.vuslx4
`else
`define vu_path `rsp_path.vu
`endif
`define VR0path `vu_path.vusl01.vudp0.vdpregfile_i
`define VR1path `vu_path.vusl01.vudp1.vdpregfile_i
`define VR2path `vu_path.vusl23.vudp0.vdpregfile_i
`define VR3path `vu_path.vusl23.vudp1.vdpregfile_i
`define VR4path `vu_path.vusl45.vudp0.vdpregfile_i
`define VR5path `vu_path.vusl45.vudp1.vdpregfile_i
`define VR6path `vu_path.vusl67.vudp0.vdpregfile_i
`define VR7path `vu_path.vusl67.vudp1.vdpregfile_i
`define VDP0path `vu_path.vusl01.vudp0
`define VDP1path `vu_path.vusl01.vudp1
`define VDP2path `vu_path.vusl23.vudp0
`define VDP3path `vu_path.vusl23.vudp1
`define VDP4path `vu_path.vusl45.vudp0
`define VDP5path `vu_path.vusl45.vudp1
`define VDP6path `vu_path.vusl67.vudp0
`define VDP7path `vu_path.vusl67.vudp1
/*******************************************
* IMEM and DMEM and reg pointers
*******************************************/
`define IMEM `rsp_path.imem.ram_prim
`define DMEM0 `rsp_path.dmemx2.dmemLow.ram_prim0
`define DMEM1 `rsp_path.dmemx2.dmemLow.ram_prim1
`define DMEM2 `rsp_path.dmemx2.dmemLow.ram_prim2
`define DMEM3 `rsp_path.dmemx2.dmemLow.ram_prim3
`define DMEM4 `rsp_path.dmemx2.dmemLow.ram_prim4
`define DMEM5 `rsp_path.dmemx2.dmemLow.ram_prim5
`define DMEM6 `rsp_path.dmemx2.dmemLow.ram_prim6
`define DMEM7 `rsp_path.dmemx2.dmemLow.ram_prim7
`define DMEM8 `rsp_path.dmemx2.dmemHigh.ram_prim0
`define DMEM9 `rsp_path.dmemx2.dmemHigh.ram_prim1
`define DMEM10 `rsp_path.dmemx2.dmemHigh.ram_prim2
`define DMEM11 `rsp_path.dmemx2.dmemHigh.ram_prim3
`define DMEM12 `rsp_path.dmemx2.dmemHigh.ram_prim4
`define DMEM13 `rsp_path.dmemx2.dmemHigh.ram_prim5
`define DMEM14 `rsp_path.dmemx2.dmemHigh.ram_prim6
`define DMEM15 `rsp_path.dmemx2.dmemHigh.ram_prim7
`define r1 `rsp_path.su.sudp.suRFile_i.mem[1]
`define r30 `rsp_path.su.sudp.suRFile_i.mem[30]
`define r31 `rsp_path.su.sudp.suRFile_i.mem[31]
/************************************************
* Key signals
************************************************/
`define CLK `rsp_path.clk
`ifdef RSP_GATE
`define Break `rsp_path.io_mem_dma.broke_reg.q
`else
`define Break `rsp_path.io_mem_dma.broke
`endif
`define Halt `rsp_path.io_mem_dma.halt
`define Reset_l `rsp_path.reset_l
/******************************************
* TimeOut Count values
******************************************/
`ifdef LARGE_TIMEOUT
`define TIMEOUT_CNT 24'h3fffff
`else
`define TIMEOUT_CNT 24'ha00
`endif
`ifdef REALITY_RSP_REGRESSION
`define TIMEOUT_CNT_SS 24'h6000
`else
`define TIMEOUT_CNT_SS 24'h3000
`endif
/*****************************************
* Trace Depth
******************************************/
`define VR_TRACE_DEPTH 256
`ifdef LARGE_TRACE_BUFFER
`define SU_TRACE_DEPTH 100000
`define DM_TRACE_DEPTH 100000
`else
`define SU_TRACE_DEPTH 2048
`define DM_TRACE_DEPTH 2048
`endif
/*********************************************
* rdram core
*********************************************/
`ifdef REALITY_RSP_REGRESSION
`ifdef RDRAM_1_PRESENT
`define rdram_0 reality.rdram_1.rdram_near_model_0
`else
`define rdram_0 reality.rdram_0.rdram_near_model_0
`endif
`endif