pi_buf.v
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// pi_buf.v v1 Frank Berndt
// pi buffer wrapper;
// :set tabstop=4
module pi_buf (
clk, csb, addr, dih, dil, web, doh, dol
);
`include "define.vh"
input clk; // sync clock;
input csb; // chip enable;
input [7:0] addr; // address;
input [40:0] dih; // high write data;
input [40:0] dil; // low write data;
input [1:0] web; // write enables;
output [40:0] doh; // high read data;
output [40:0] dol; // low read data;
// 256x82 sync SRAM, write enable granularity is 41;
`ifdef NEC_PIBUF
WBSRAMSHS256W41C3 pibuf0 (
.DO40(dol[40]),
.DO39(dol[39]),
.DO38(dol[38]),
.DO37(dol[37]),
.DO36(dol[36]),
.DO35(dol[35]),
.DO34(dol[34]),
.DO33(dol[33]),
.DO32(dol[32]),
.DO31(dol[31]),
.DO30(dol[30]),
.DO29(dol[29]),
.DO28(dol[28]),
.DO27(dol[27]),
.DO26(dol[26]),
.DO25(dol[25]),
.DO24(dol[24]),
.DO23(dol[23]),
.DO22(dol[22]),
.DO21(dol[21]),
.DO20(dol[20]),
.DO19(dol[19]),
.DO18(dol[18]),
.DO17(dol[17]),
.DO16(dol[16]),
.DO15(dol[15]),
.DO14(dol[14]),
.DO13(dol[13]),
.DO12(dol[12]),
.DO11(dol[11]),
.DO10(dol[10]),
.DO9(dol[9]),
.DO8(dol[8]),
.DO7(dol[7]),
.DO6(dol[6]),
.DO5(dol[5]),
.DO4(dol[4]),
.DO3(dol[3]),
.DO2(dol[2]),
.DO1(dol[1]),
.DO0(dol[0]),
.DI40(dil[40]),
.DI39(dil[39]),
.DI38(dil[38]),
.DI37(dil[37]),
.DI36(dil[36]),
.DI35(dil[35]),
.DI34(dil[34]),
.DI33(dil[33]),
.DI32(dil[32]),
.DI31(dil[31]),
.DI30(dil[30]),
.DI29(dil[29]),
.DI28(dil[28]),
.DI27(dil[27]),
.DI26(dil[26]),
.DI25(dil[25]),
.DI24(dil[24]),
.DI23(dil[23]),
.DI22(dil[22]),
.DI21(dil[21]),
.DI20(dil[20]),
.DI19(dil[19]),
.DI18(dil[18]),
.DI17(dil[17]),
.DI16(dil[16]),
.DI15(dil[15]),
.DI14(dil[14]),
.DI13(dil[13]),
.DI12(dil[12]),
.DI11(dil[11]),
.DI10(dil[10]),
.DI9(dil[9]),
.DI8(dil[8]),
.DI7(dil[7]),
.DI6(dil[6]),
.DI5(dil[5]),
.DI4(dil[4]),
.DI3(dil[3]),
.DI2(dil[2]),
.DI1(dil[1]),
.DI0(dil[0]),
.A7(addr[7]),
.A6(addr[6]),
.A5(addr[5]),
.A4(addr[4]),
.A3(addr[3]),
.A2(addr[2]),
.A1(addr[1]),
.A0(addr[0]),
.WEB(web[0]),
.CSB(csb),
.BE(clk),
.TBE(1'b0),
.TEST(1'b0),
.BUB(1'b1)
);
WBSRAMSHS256W41C3 pibuf1 (
.DO40(doh[40]),
.DO39(doh[39]),
.DO38(doh[38]),
.DO37(doh[37]),
.DO36(doh[36]),
.DO35(doh[35]),
.DO34(doh[34]),
.DO33(doh[33]),
.DO32(doh[32]),
.DO31(doh[31]),
.DO30(doh[30]),
.DO29(doh[29]),
.DO28(doh[28]),
.DO27(doh[27]),
.DO26(doh[26]),
.DO25(doh[25]),
.DO24(doh[24]),
.DO23(doh[23]),
.DO22(doh[22]),
.DO21(doh[21]),
.DO20(doh[20]),
.DO19(doh[19]),
.DO18(doh[18]),
.DO17(doh[17]),
.DO16(doh[16]),
.DO15(doh[15]),
.DO14(doh[14]),
.DO13(doh[13]),
.DO12(doh[12]),
.DO11(doh[11]),
.DO10(doh[10]),
.DO9(doh[9]),
.DO8(doh[8]),
.DO7(doh[7]),
.DO6(doh[6]),
.DO5(doh[5]),
.DO4(doh[4]),
.DO3(doh[3]),
.DO2(doh[2]),
.DO1(doh[1]),
.DO0(doh[0]),
.DI40(dih[40]),
.DI39(dih[39]),
.DI38(dih[38]),
.DI37(dih[37]),
.DI36(dih[36]),
.DI35(dih[35]),
.DI34(dih[34]),
.DI33(dih[33]),
.DI32(dih[32]),
.DI31(dih[31]),
.DI30(dih[30]),
.DI29(dih[29]),
.DI28(dih[28]),
.DI27(dih[27]),
.DI26(dih[26]),
.DI25(dih[25]),
.DI24(dih[24]),
.DI23(dih[23]),
.DI22(dih[22]),
.DI21(dih[21]),
.DI20(dih[20]),
.DI19(dih[19]),
.DI18(dih[18]),
.DI17(dih[17]),
.DI16(dih[16]),
.DI15(dih[15]),
.DI14(dih[14]),
.DI13(dih[13]),
.DI12(dih[12]),
.DI11(dih[11]),
.DI10(dih[10]),
.DI9(dih[9]),
.DI8(dih[8]),
.DI7(dih[7]),
.DI6(dih[6]),
.DI5(dih[5]),
.DI4(dih[4]),
.DI3(dih[3]),
.DI2(dih[2]),
.DI1(dih[1]),
.DI0(dih[0]),
.A7(addr[7]),
.A6(addr[6]),
.A5(addr[5]),
.A4(addr[4]),
.A3(addr[3]),
.A2(addr[2]),
.A1(addr[1]),
.A0(addr[0]),
.WEB(web[1]),
.CSB(csb),
.BE(clk),
.TBE(1'b0),
.TEST(1'b0),
.BUB(1'b1)
);
`else // NEC_PIBUF
// behavioral buffer;
// simulate no write-through;
reg [40:0] pibufh [0:255];
reg [40:0] pibufl [0:255];
reg pibuf_en;
reg [7:0] pibuf_a;
reg [40:0] pibuf_dih;
reg [40:0] pibuf_dil;
reg [1:0] pibuf_we;
always @(posedge clk)
begin
pibuf_en <= ~csb;
pibuf_a <= addr;
pibuf_dih <= dih;
pibuf_dil <= dil;
pibuf_we <= ~web;
if(pibuf_en & pibuf_we[1])
pibufh[pibuf_a] <= pibuf_dih;
if(pibuf_en & pibuf_we[0])
pibufl[pibuf_a] <= pibuf_dil;
end
assign doh = pibuf_en? pibufh[pibuf_a] : {41{1'bx}};
assign dol = pibuf_en? pibufl[pibuf_a] : {41{1'bx}};
`endif // NEC_PIBUF
endmodule