ipc.vh
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// ipc.vh v1 Frnak Berndt
// ip declarations;
`define IPC_SERVER 2
`define PKT_SIZE_BYTE 48
`define PKT_SIZE_WORD 12
// offsets to various fields;
//
// struct _IpcPktStruct {
// u_int length;
// u_int code;
// u_int size;
// u_int address;
// u_int data[8];
// };
`define PKT_LEN_OFS 0
`define PKT_CODE_OFS 1
`define PKT_SIZE_OFS 2
`define PKT_ADDR_OFS 3
`define PKT_DATA_OFS 4
// request codes;
// XX add backdoors of various devices;
`define REQ_SINGLE_READ 1
`define REQ_SINGLE_WRITE 2
`define REQ_BLOCK_READ 3
`define REQ_BLOCK_WRITE 4
`define REQ_STALL 5
`define REQ_LOG 6
`define REQ_RUN_TEST 7
`define REQ_QUIT 100
`define BCP_SIM_MEM_INFO 32'h80001500
`define BCP_SIM_TIME 32'h80001501
`define BCP_SYSCLK_PERIOD 32'h80001502
`define BCP_VCLK_PERIOD 32'h80001503
`define BCP_SET_RSP_TIMEOUT 32'h80001505
`define BCP_GET_RSP_TIMEOUT 32'h80001506
// BCP extension for memory backdoor/xz value support
// BCP request code extension
// bit 31: zero time operation (All backdoor access)
// bit 30: soft turn off ipc_mon
// bit 29-20 : Try to simplify verilog and PLI
// bit 29: need xz value combination (PLI only)
// bit 28: need xz value split(pass to responds)
// bit 27-24: # combined words
// bit 23-20: # split words
`define BD_REQ_SINGLE_READ 32'h80001001
`define BD_REQ_SINGLE_WRITE 32'h80001002
`define BD_REQ_SINGLE_SEARCH 32'h80001086
`define BD_REQ_DISPLAY_MSG 32'h80001087
`define BD_REQ_BLOCK_READ 32'h80001003
`define BD_REQ_BLOCK_WRITE 32'h80001004
//Turn on/off dump
`define BD_REQ_DUMP 32'h80001100
// keep_alive socket
`define OPEN_ALIVE_SOCKET 32'h80004000
`define CLOSE_ALIVE_SOCKET 32'h80004001
`define VI_SNOOP_ON 32'h80004002
`define VI_SNOOP_OFF 32'h80004003
`define GET_VI_TAB_FILE 32'h80004004
`define READ_VI_TAB_FILE 32'h80004005
// Backdoor for RSP CTRACE TEST (0x800041xx)
`define RSP_CTRACE_TEST_ON 32'h80004100
`define RSP_CTRACE_TEST_NEXT 32'h80004101
`define RSP_CTRACE_TEST_OFF 32'h80004102
`define RSP_CTRACE_STATUS 32'h80004105
`define RSP_CTRACE_DATA 32'h80004104
`define RSP_IMEM_LOAD 32'h80004103
`define RSP_DMEM_LOAD 32'h80004107
`define BCP_USB_TEST_ON 32'h80004200
`define BCP_LINESTATE 32'h80004201
`define BCP_USB_OTG_DONE 32'h80004202
`define BCP_USB_READ_DATA 32'h80004210
`define BCP_USB_WRITE_DATA 32'h80004211
`define BCP_USB_READ_STAT 32'h80004212
`define BCP_USB_TERM_CTL 32'h80004214
`define BCP_USB_HOST_CTL 32'h80004216
`define BCP_USB_BIAS_CTL 32'h80004218
// Memory module presence insert/remove backdoor
`define BD_MM_PRESENT 32'h80004300
`define BD_ZERO_STAT 32'h80005300
`define BD_DISP_STAT 32'h80005301
// JTAG Backdoor
`define BD_JTAG_WRITE 32'h80004400
`define BD_JTAG_READ 32'h80004401
`define BD_JTAG_ENABLE 32'h80004402
// Debug port backdoor
`define BD_DBUG_DWRITE 32'h80004500
`define BD_DBUG_DREAD 32'h80004501
`define BD_DBUG_CWRITE 32'h80004502
`define BD_DBUG_CREAD 32'h80004503
// BD pin reset
`define BD_PIN_RESET 32'h80004600
// Clock monitor disable/enable
`define BD_CLOCK_MON_ENABLE 32'h80004700
// Check 9th bits
`define BCP_9TH_BITS 32'h80004800
// request size codes;
`define REQ_SZ_BYTE 1
`define REQ_SZ_HALF 2
`define REQ_SZ_WORD 4
`define REQ_SZ_DWORD 8
// response codes;
`define RSP_OK 32'h1
`define RSP_DATA 2
`define RSP_LOAD 3
`define RSP_STORE 4
`define RSP_ERROR 100
// SI backdoor functions
`define BD_REQ_SI_CTRL 32'h80001090
`define LOCAL_CTRL 0
`define JCTRL_1 1
`define JCTRL_2 2
`define JCTRL_3 3
`define LCTRL_XMOVE 0 //integer
`define LCTRL_YMOVE 1 //integer
`define LCTRL_JITTER 2 //integer
`define LCTRL_BUTTON 5 //bits [15:0]
`define LCTRL_TLOW 6 //integer
`define LCTRL_TXFER 7 //integer
`define LCTRL_THIGH 8 //integer
`define LCTRL_XGLITCH 9 //bits [1:0]
`define LCTRL_YGLITCH 10 //bits [1:0]
`define CTRL_ENALE 0 //LSB
`define CTRL_DIV 1 //Bits [3:0]
`define CTRL_TYPE_L 2 //Bits [7:0]
`define CTRL_TYPE_H 3 //Bits [7:0]
`define CTRL_STATUS 4 //Bits [7:0]
`define CTRL_BUTTON 5 //Bits [15:0]
`define CTRL_X 6 //Bits [7:0]
`define CTRL_Y 7 //Bits [7:0]
`define CTRL_RSP_RAND 8 //LSB
`define CTRL_COLLISION 9 //bits [3:0]
`define CTRL_FRAMEERR 10 //bits [5:0]
`define CTRL_RSP_ECHO 11 //LSB
`define CTRL_GLITCH_DETECT 12 //LSB
`define CTRL_RESET 13 //LSB
`define CTRL_MASTER 14 //LSB
`define CTRL_TX_SIZE 15 //Bits [7:0]
`define CTRL_TX_ON 16 //Bits [7:0]
`define CTRL_RX_LAST 17 //Bits [7:0]
`define CTRL_TX_DATA_0_7 18 // 8 packed 8 bit bytes
`define CTRL_TX_DATA_8_35 19 //28 packed 8 bit bytes
`define CTRL_READ_DATA 20 //32 packed 8 bit bytes
`define MJCTRL 4 // master controller
`define MJCTRL_ENALE 0 // enable (lsb)
`define MJCTRL_DIV 1 // clock divider [3:0]
`define MJCTRL_CMD 2 // command register [7:0]
`define MJCTRL_CTL 3 // control register [7:0]
`define MJCTRL_CMD0 8'h00 // command 0
`define MJCTRL_CMD1 8'h01 // command 1
`define MJCTRL_CMD255 8'hff // command 255
`define BD_RD_SI_CTRL 32'h800010a0
`define BD_RD_SI_CTRL_PKD 32'h800010a1
`define CTRL_RX_SIZE 0 //Bits [7:0]
`define CTRL_RX_DATA_0_7 1 // 8 packed 8 bit bytes
`define CTRL_RX_DATA_8_35 2 //28 packed 8 bit bytes
`define MJCTRL_RX_DATA_3 3 //3 packed 8 bit bytes
`define MJCTRL_RX_DATA_4 4 //4 packed 8 bit bytes