ms_latch72.v
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
// $Id: ms_latch72.v,v 1.1 2002/03/28 00:26:13 berndt Exp $
////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: ms_latch72
// description: Transparent latches: rdram to spanbuf, transp=clk
//
// designer: Mike M. Cai / Robert W. Sherburne
// date: 12/16/94 revised 1/6/95
//
////////////////////////////////////////////////////////////////////////
module ms_latch72 (d_out, clk, g, d_in);
output [71:0] d_out;
input [71:0] d_in;
input clk, g;
wire [7:0] d0, d1, d2, d3, d4, d5, d6, d7, d8;
wire [7:0] q0, q1, q2, q3, q4, q5, q6, q7, q8;
wire e0, e1, e2, e3, e4, e5, e6, e7, e8;
wire gn;
assign {d8, d7, d6, d5, d4, d3, d2, d1, d0} = d_in;
assign d_out = {q8, q7, q6, q5, q4, q3, q2, q1, q0};
ni01d5 in_0(.i(g), .z(gn));
an02d2 an_0(.a1(clk), .a2(gn), .z(e0));
an02d2 an_1(.a1(clk), .a2(gn), .z(e1));
an02d2 an_2(.a1(clk), .a2(gn), .z(e2));
an02d2 an_3(.a1(clk), .a2(gn), .z(e3));
an02d2 an_4(.a1(clk), .a2(gn), .z(e4));
an02d2 an_5(.a1(clk), .a2(gn), .z(e5));
an02d2 an_6(.a1(clk), .a2(gn), .z(e6));
an02d2 an_7(.a1(clk), .a2(gn), .z(e7));
an02d2 an_8(.a1(clk), .a2(gn), .z(e8));
ms_latch_h #(8) l_0(.e(e0), .d(d0), .q(q0));
ms_latch_h #(8) l_1(.e(e1), .d(d1), .q(q1));
ms_latch_h #(8) l_2(.e(e2), .d(d2), .q(q2));
ms_latch_h #(8) l_3(.e(e3), .d(d3), .q(q3));
ms_latch_h #(8) l_4(.e(e4), .d(d4), .q(q4));
ms_latch_h #(8) l_5(.e(e5), .d(d5), .q(q5));
ms_latch_h #(8) l_6(.e(e6), .d(d6), .q(q6));
ms_latch_h #(8) l_7(.e(e7), .d(d7), .q(q7));
ms_latch_h #(8) l_8(.e(e8), .d(d8), .q(q8));
endmodule //