cbus_mon.v
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module cbus_mon(clock, reset_l);
`include "rcp.vh"
`include "define.vh"
input clock;
input reset_l;
reg [7*8:1] device;
reg [DMA_DEVICE_SIZE-1:0] master;
reg [DMA_DELAY_SIZE-1:0] delay;
reg read;
reg [DMA_LENGTH_SIZE-1:0] length;
integer state;
parameter
STATE_IDLE = 0,
STATE_DMA_LENGTH = 1,
STATE_WRITE_DATA = 2;
reg monitor;
initial monitor = $test$plusargs("cbus_mon");
always @(posedge clock) begin
if (!reset_l) begin
state <= STATE_IDLE;
end
else if (monitor) begin
case (HIGH)
reality.rcp_0.sp_cbus_write_enable : device = "sp ";
reality.rcp_0.mi_cbus_write_enable : device = "mi ";
reality.rcp_0.span_cbus_write_enable : device = "span";
reality.rcp_0.cmd_cbus_write_enable : device = "cmd ";
reality.rcp_0.pi_cbus_write_enable : device = "pi ";
reality.rcp_0.ri_cbus_write_enable : device = "ri ";
reality.rcp_0.si_cbus_write_enable : device = "si ";
reality.rcp_0.ai_cbus_write_enable : device = "ai ";
reality.rcp_0.vi_cbus_write_enable : device = "vi ";
reality.rcp_0.mem_cbus_write_enable : device = "mem ";
default : device = "unk ";
endcase
case (state)
STATE_IDLE : begin
case (reality.rcp_0.cbus_command)
CBUS_DMA_COMMAND : begin
$display(`CLOCK_COUNT, " : cbus dma address - %h from %s", reality.rcp_0.cbus_data, device);
state <= STATE_DMA_LENGTH;
end
CBUS_WRITE_COMMAND : begin
$display(`CLOCK_COUNT, " : cbus write address - %h from %s", reality.rcp_0.cbus_data, device);
state <= STATE_WRITE_DATA;
end
CBUS_READ_COMMAND : begin
$display(`CLOCK_COUNT, " : cbus read address - %h from %s", reality.rcp_0.cbus_data, device);
state <= STATE_IDLE;
end
CBUS_RESPONSE_COMMAND : begin
$display(`CLOCK_COUNT, " : cbus response data - %h from %s", reality.rcp_0.cbus_data, device);
state <= STATE_IDLE;
end
CBUS_REFRESH_COMMAND : begin
$display(`CLOCK_COUNT, " : cbus refresh");
state <= STATE_IDLE;
end
CBUS_IDLE_COMMAND : ;
default : begin
$display(`CLOCK_COUNT, " : cbus unknown - %h from %s", reality.rcp_0.cbus_command, device);
end
endcase
end
STATE_DMA_LENGTH : begin
{master, delay, read, length} = reality.rcp_0.cbus_data;
$display(`CLOCK_COUNT,
" : cbus dma length - master %h, delay %h, read %h, length %h, from %s",
master, delay, read, length, device);
state <= STATE_IDLE;
end
STATE_WRITE_DATA : begin
$display(`CLOCK_COUNT, " : cbus write data - %h from %s", reality.rcp_0.cbus_data, device);
state <= STATE_IDLE;
end
endcase
end
end
endmodule