atspeed_pi
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#!/bin/sh
if [ "$ROOT" = "" ]; then
echo "Please specified the ROOT "
exit
fi
cd ${ROOT}/PR/hw2/chip/vsim
rm -f verilog.dump
rm -f dump.v
cp -f dump.v.padio dump.v
make clean
export SIMDEFS="+nospecify +define+TEST_VECTORS +define+FLASH_BIG +CM+ALL+LIBS"
make sim.cpu.ipc
cp ${ROOT}/PR/cpusim/pi/flatb.fl External_File.txt
cp ${ROOT}/PR/lib/bbboot/final/rom.hex final_rom
./sim.cpu.ipc +CM+NAME=pi1 +sysclk=10400 +vclk=20800 +delay_mode_zero +cbus_mon +cpu_mon +non_clk_mon +brom=final_rom $DUMPOPTS >log 2>&1 &
cd ${ROOT}/PR/cpusim/mi
export CPU_625=1
export NO_DDR_TEST=1
make clean
make
cd ${ROOT}/PR/iosim/src/jtag_test
export CPU_AT_5MHZ=1
export JTAG_CLK_FAST=1
rm test_vector
make clean
make test_vector
###### 1st PI test ######
./test_vector -t PI -q -S 10208 -0 ${ROOT}/PR/cpusim/mi/atspeed_ddr.dat -1 ${ROOT}/PR/cpusim/mi/atspeed_comp.dat
###### 2nd PI test ######
#### Waiting for enough time(2.5min) for previous test done
sleep 150
cd ${ROOT}/PR/hw2/chip/vsim
/ecad/vcs/virsimdir/bin/vcd2vpd verilog.dump atspeed_pi.vpd
./sim.cpu.ipc +CM+NAME=pi2 +sysclk=10400 +vclk=20800 +delay_mode_zero +cbus_mon +cpu_mon +non_clk_mon +brom=final_rom $DUMPOPTS >>log 2>&1 &
cd ${ROOT}/PR/iosim/src/jtag_test
./test_vector -t P2 -q -S 10208 -0 ${ROOT}/PR/cpusim/mi/atspeed_ddr.dat -1 ${ROOT}/PR/cpusim/mi/atspeed_comp.dat
cd ${ROOT}/PR/hw2/chip/vsim
/ecad/vcs/virsimdir/bin/vcd2vpd verilog.dump atspeed_pi2.vpd