nvram_util.c
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#include <PR/bbnvram.h>
#include "ultra64.h"
#include "os_bb.h"
#include <PR/bcp.h>
#include "nu64sys.h"
#include "graph.h"
/*
#include "bcp_util.h"
#include "iomap.h"
*/
#include "nvram_util.h"
#if 0
static char *STORE_PW_STRINGS[] = {"2 ms",
"10 ms",
"50 ms",
"250 ms"};
static char *NMAX_STRINGS[] = {"2 pulses",
"10 pulses",
"50 pulses",
"250 pulses"};
static char *VPPMAX_STRINGS[] = {"7.6 V",
"8.0 V",
"8.4 V",
"8.8 V"};
static char *VPPLEVEL_STRINGS[] = {"5.8V",
"6.0 V",
"6.2 V",
"6.4 V",
"6.6 V",
"6.8 V",
"7.0 V",
"7.2 V",
"7.4 V",
"7.6 V",
"7.8 V",
"8.0 V",
"8.2 V",
"8.4 V",
"8.6 V",
"8.8 V"};
static char *VPPDELTA_STRINGS[] = {"200 mV",
"400 mV",
"800 mV",
"1600 mV"};
#endif
/* defined as global in main() */
/*
extern int sysclk_scale;
*/
#if 0
void print_crsto_1(FILE *fp, int reg)
{
fprintf(fp, "VPP Max: %s\n", VPPMAX_STRINGS[((reg & NMS_VPPMAX_MASK) >> NMS_VPPMAX_SHIFT)]);
fprintf(fp, "VPP Delta: %s\n", VPPDELTA_STRINGS[((reg & NMS_VPPDELTA_MASK) >> NMS_VPPDELTA_SHIFT)]);
fprintf(fp, "X (number of dumb pulses): %d\n", (reg & NMS_X_MASK) >> NMS_X_SHIFT);
}
void print_crsto_0(FILE *fp, int reg)
{
fprintf(fp, "Pulse width: %s\n", STORE_PW_STRINGS[((reg & NMS_STORE_PW_MASK) >> NMS_STORE_PW_SHIFT)]);
fprintf(fp, "NMAX: %s\n", NMAX_STRINGS[((reg & NMS_NMAX_MASK) >> NMS_NMAX_SHIFT)]);
fprintf(fp, "VPP Level: %s\n", VPPLEVEL_STRINGS[((reg & NMS_VPPLEVEL_MASK) >> NMS_VPPLEVEL_SHIFT)]);
}
void print_ctrl(FILE *fp, int reg)
{
fprintf(fp, "Virage control register\n");
fprintf(fp, "CP PORST: %d, ", (reg & VIRAGE_CTRL_CP_PORST));
fprintf(fp, "Unlock: %d, ", (reg & VIRAGE_CTRL_CP_UNLOCK) ? 1 : 0);
fprintf(fp, "VPP Select: %d, ", (reg & VIRAGE_CTRL_CP_VPPSEL_MASK) >> VIRAGE_CTRL_CP_VPPSEL_SHIFT);
fprintf(fp, "VPP Range: %d, ", (reg & VIRAGE_CTRL_CP_VRANGE) ? 1 : 0);
fprintf(fp, "Data: %d, ", (reg & VIRAGE_CTRL_CP_DATA) ? 1 : 0);
fprintf(fp, "Pump enable: %d, ", (reg & VIRAGE_CTRL_CP_PE) ? 1 : 0);
fprintf(fp, "Pump reset: %d\n", (reg & VIRAGE_CTRL_CP_RESET) ? 1 : 0);
fprintf(fp, "NV Bias: %d, ", (reg & VIRAGE_CTRL_NV_BIAS_MASK) >> VIRAGE_CTRL_NV_BIAS_SHIFT);
fprintf(fp, "TECC: %d, ", (reg & VIRAGE_CTRL_NV_TECC_MASK) >> VIRAGE_CTRL_NV_TECC_SHIFT);
fprintf(fp, "MRCL: %d, ", (reg & VIRAGE_CTRL_NV_MRCL_MASK) >> VIRAGE_CTRL_NV_MRCL_SHIFT);
fprintf(fp, "Compare: %d, ", (reg & VIRAGE_CTRL_NV_COMP) ? 1 : 0);
fprintf(fp, "Store: %d, ", (reg & VIRAGE_CTRL_NV_STORE) ? 1 : 0);
fprintf(fp, "Recall: %d, ", (reg & VIRAGE_CTRL_NV_RECALL) ? 1 : 0);
fprintf(fp, "Match: %d, ", (reg & VIRAGE_CTRL_NV_MATCH) ? 1 : 0);
fprintf(fp, "RCREADY: %d\n", (reg & VIRAGE_CTRL_NV_RCREADY) ? 1 : 0);
fprintf(fp, "NMS Command: %d, ", (reg & VIRAGE_CTRL_NMS_CMD_MASK) >> VIRAGE_CTRL_NMS_CMD_SHIFT);
fprintf(fp, "Keep: %d, ", (reg & VIRAGE_CTRL_NMS_KEEP) ? 1 : 0);
fprintf(fp, "Pass: %d, ", (reg & VIRAGE_CTRL_NMS_PASS) ? 1 : 0);
fprintf(fp, "Ready: %d, ", (reg & VIRAGE_CTRL_NMS_READY) ? 1 : 0);
fprintf(fp, "Bypass: %d\n", (reg & VIRAGE_CTRL_NMS_BYPASS) ? 1 : 0);
}
int get_vpp(int reg){
return ((reg & VIRAGE_CTRL_CP_VPPSEL_MASK) >> VIRAGE_CTRL_CP_VPPSEL_SHIFT);
}
int get_mrcl_tecc_bias(int x, unsigned char * newmrcl, unsigned char * newtecc, unsigned char * newbias){
*newmrcl = (x & VIRAGE_CTRL_NV_MRCL_MASK) >> VIRAGE_CTRL_NV_MRCL_SHIFT;
*newtecc = (x & VIRAGE_CTRL_NV_TECC_MASK) >> VIRAGE_CTRL_NV_TECC_SHIFT;
*newbias = (x & VIRAGE_CTRL_NV_BIAS_MASK) >> VIRAGE_CTRL_NV_BIAS_SHIFT;
}
#endif
/*
* Get the system clock and scale it by some factor to speed up the NoVEA operations
*/
int get_sys_clk_ns(int sysclk_scale)
{
int sysclk_ps;
/* pico seconds system clock period */
sysclk_ps = 10416;
return (sysclk_ps * sysclk_scale) / 1000;
}
int nms_recall(int sysclk_scale, int ctrl_reg)
{
int x, i;
int nms_ctrl_reg = ctrl_reg | 0x2000;
int sysclk = get_sys_clk_ns(sysclk_scale);
/*
* Issue a recall to make sure it got stored
*/
IO_WRITE(nms_ctrl_reg, NMS_CMD_RECALL << VIRAGE_CTRL_NMS_CMD_SHIFT);
/*
* Wait for the RCready time
*/
for(i =0; i< (EXTRA_WAIT + Trcready/sysclk)*DELAY_MULT; i++){
;
}
/*
BCP_STALL(EXTRA_WAIT + Trcready/sysclk);
*/
/*
* Extra wait since we are going through NMS - Don't have a timing spec here
*/
/*
BCP_STALL((MORE_EXTRA_WAIT) + Trcready/sysclk);
*/
for(i =0; i< (MORE_EXTRA_WAIT + Trcready/sysclk)*DELAY_MULT; i++){
;
}
x = IO_READ(ctrl_reg);
if ((x & VIRAGE_CTRL_NMS_READY) == 0) {
sprintf(buf, "NMS Recall: Timeout failure");
printstr(white, 3, 10, buf);
osWritebackDCacheAll();
return FAIL;
}
return PASS;
}
#if 0
int nms_store(int ctrl_reg, int store_pw, int vpp_level,
int vpp_max, int vpp_delta, int max_pulses, int dumb_pulses)
{
int x, i;
int old_x;
int nms_ctrl_reg = ctrl_reg | 0x2000;
int crst_base_reg = (ctrl_reg & 0xffff0000) | 0x8000;
char buf[512];
/*
* Set up the CRSTO registers
*/
IO_WRITE(crst_base_reg, (store_pw << NMS_STORE_PW_SHIFT) |
(max_pulses << NMS_NMAX_SHIFT) |
(vpp_level << NMS_VPPLEVEL_SHIFT));
IO_WRITE(crst_base_reg + 4, (vpp_max << NMS_VPPMAX_SHIFT) |
(vpp_delta << NMS_VPPDELTA_SHIFT) |
(dumb_pulses << NMS_X_SHIFT));
/*
if (LogFp) {
print_crsto_0(LogFp, IO_READ(crst_base_reg));
print_crsto_1(LogFp, IO_READ(crst_base_reg+4));
}
*/
IO_WRITE(nms_ctrl_reg, NMS_CMD_STORE << VIRAGE_CTRL_NMS_CMD_SHIFT);
/*
BCP_STALL(100);
*/
for(i =0; i < 100*DELAY_MULT; i++){
;
}
x = IO_READ(ctrl_reg);
if (x & VIRAGE_CTRL_NMS_READY) {
sprintf(buf, "NMS Store: ready not low\n");
printstr(white, 3, 7, buf);
osWritebackDCacheAll();
return FAIL;
}
/*
* Keep reading registers and printing out for monitoring
* XXX Need a time-out
*/
old_x = -1;
do {
/*
BCP_STALL(10);
SIM_TIME(&end_sim_time);
*/
for(i =0; i < 10*DELAY_MULT; i++){
;
}
x = IO_READ(ctrl_reg);
if (old_x != x) {
sprintf(buf, "NMS Store: ready not low");
printstr(white, 3, 10, buf);
osWritebackDCacheAll();
/*
if (LogFp) {
fprintf(LogFp, "NMS Store: Ctrl reg %lld 0x%x\n", end_sim_time, x);
print_ctrl(LogFp, x);
}
*/
old_x = x;
}
} while ((x & VIRAGE_CTRL_NMS_READY) == 0);
if ((x & VIRAGE_CTRL_NMS_PASS) == 0) {
sprintf(buf, "NMS Store: Store did not pass");
printstr(white, 3, 10, buf);
osWritebackDCacheAll();
return FAIL;
}
return PASS;
}
#endif
/* this version does not set CRST* registers, uses defaults */
int nms_store_default(int ctrl_reg)
{
u32 x;
int i, count, dummy;
int old_x;
int nms_ctrl_reg = ctrl_reg | 0x2000;
IO_WRITE(nms_ctrl_reg, NMS_CMD_STORE << VIRAGE_CTRL_NMS_CMD_SHIFT);
x = IO_READ(ctrl_reg);
for(i=0; i< 100; i++){
;
}
x = IO_READ(ctrl_reg);
if (x & VIRAGE_CTRL_NMS_READY) {
sprintf(buf, "NMS Store: ready not low");
printstr(white, 3, 8, buf);
osWritebackDCacheAll();
return FAIL;
}
/*
* Keep reading registers and printing out for monitoring
* XXX Need a time-out
*/
old_x = -1;
count = 0;
dummy =0;
x = IO_READ(ctrl_reg);
while((x & VIRAGE_CTRL_NMS_READY) == 0){
dummy = 0;
for(i=0; i< 100; i++){
dummy++;
}
x = IO_READ(ctrl_reg);
count++;
}
x = IO_READ(ctrl_reg);
/*
if ((x & VIRAGE_CTRL_NMS_PASS) == 0) {
sprintf(buf, "NMS Store: Store did not pass");
printstr(white, 3, 10, buf);
osWritebackDCacheAll();
return FAIL;
}
sprintf(buf, "NMS Store: NMS store passed");
printstr(white, 3, 10, buf);
osWritebackDCacheAll();
*/
return PASS;
}