viragerw.c 2.42 KB
#include "cpusim.h"
#include "PR/bbnvram.h"

static int
virage0_store(void) {
    unsigned rv;

    IO_WRITE(VIRAGE0_NMS_REG, 0); /* ensure not bypassed */
    while(!(IO_READ(VIRAGE0_NMS_REG) & VIRAGE_CTRL_NMS_READY)) ;
    IO_WRITE(VIRAGE0_NMS_REG, NMS_CMD_STORE<<VIRAGE_CTRL_NMS_CMD_SHIFT);
    IO_READ(VIRAGE0_NMS_REG); /* wait */
    while(!((rv = IO_READ(VIRAGE0_NMS_REG)) & VIRAGE_CTRL_NMS_READY)) ;
    return (rv & VIRAGE_CTRL_NMS_PASS) != VIRAGE_CTRL_NMS_PASS;
}

static int
virage0_recall(void) {
    IO_WRITE(VIRAGE0_NMS_REG, 0); /* ensure not bypassed */
    while(!(IO_READ(VIRAGE0_NMS_REG) & VIRAGE_CTRL_NMS_READY)) ;
    IO_WRITE(VIRAGE0_NMS_REG, NMS_CMD_RECALL<<VIRAGE_CTRL_NMS_CMD_SHIFT);
    IO_READ(VIRAGE0_NMS_REG); /* wait */
    while(!(IO_READ(VIRAGE0_NMS_REG) & VIRAGE_CTRL_NMS_READY)) ;
    return 0;
}

void
passed(void) {
    message("test viragerw passed\n");
    DBG_JTAG_PASS("test viragerw passed\n");
    test_postamble();
}

void
failed(const char* code) {
    message("test viragerw failed (");
    message(code);
    message(")\n");
    DBG_JTAG_FAIL(code);
    test_postamble();
}

int
main() {
    int i;
    unsigned sum = 0;
    test_preamble();

    /* shorten timer cycle, should normally be 1 us */
#ifdef DBG_JTAG
    #define VIRAGE_96MHZ_VTIMER 101
    IO_WRITE(MI_SEC_VTIMER_REG, VIRAGE_96MHZ_VTIMER);	
#else
    IO_WRITE(MI_SEC_VTIMER_REG, 5);
#endif

#if 0
    /* initialize store parameters with values to speed things up */
    IO_WRITE(VIRAGE0_NMS_CRSTO_0_REG, (NMS_STORE_PW_10MS << NMS_STORE_PW_SHIFT) |
	    			      (NMS_NMAX_2 << NMS_NMAX_SHIFT) |
				      (NMS_VPPLEVEL_8P0V << NMS_VPPLEVEL_SHIFT));
    IO_WRITE(VIRAGE0_NMS_CRSTO_1_REG, (NMS_VPPMAX_8P0V << NMS_VPPMAX_SHIFT) |
	    			      (NMS_VPPDELTA_400MV << NMS_VPPDELTA_SHIFT) |
				      (0 << NMS_X_SHIFT));
#endif

    virage0_recall();
    for(i = 0; i < VIRAGE0_RAM_END-VIRAGE0_RAM_START; i+=4)
	sum += *(vu32*)PHYS_TO_K1(VIRAGE0_RAM_START+i);
    if (sum != 0x674873e3) failed("0");

    for(i = 0; i < VIRAGE0_RAM_END-VIRAGE0_RAM_START; i+=4)
	*(vu32*)PHYS_TO_K1(VIRAGE0_RAM_START+i) ^= 0xffffffff;
    if (virage0_store()) failed("1");

    for(i = 0; i < VIRAGE0_RAM_END-VIRAGE0_RAM_START; i+=4)
	*(vu32*)PHYS_TO_K1(VIRAGE0_RAM_START+i) = 0;
    virage0_recall();
    sum = 0;
    for(i = 0; i < VIRAGE0_RAM_END-VIRAGE0_RAM_START; i+=4)
	sum += ~*(vu32*)PHYS_TO_K1(VIRAGE0_RAM_START+i);
    if (sum != 0x674873e3) failed("2");
    passed();
    return 0;
}