Makefile
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#!smake
#
# This makefile has rules for making both the executables
# which make up the simulator, and for running test cases.
#
# This makefile should do a make in InData/ before making
# any test in this directory.
#
# $Revision: 1.1.1.1 $
#
LCOPTS = -g
COMMONPREF=RDPSIM
PRDEPTH = ../../..
include $(PRDEPTH)/PRdefs
#
# Subdirectories
#
include $(ROOT)/usr/include/make/ismcommondefs
SHELL=/sbin/ksh
#
# Directories
#
SIMLIB = ../../simlib
SRC = ../../src
HDR = ../../hdr
VERILOG = ../rdp
WIR = Wir
INDATA = InData
OUTDATA = OutData
INRGB = InRgb
OUTRGB = OutRgb
TMEMDATA = TmemData
RAWDATA = RawData
TILEDATA = TileData
QSIM = ./fixture/qsim
SUBDIRS = $(WIR) $(INDATA) $(OUTDATA)
#
# Check for objects in this directory
#
VPATH = $(SRC)
#
# Verilog Sources
#
VSRCS = $(VERILOG)/add1.v
#
# C Sources
#
TEST_FILES = \
$(SRC)/tc.c \
$(SRC)/tm.c \
expand.c \
driver.c \
display.c \
gl_dev.c \
tctm_0.c
#
# Object Files
#
TEST_OBJ = ${TEST_FILES:.c=.o}
TEST_OBJS = ${TEST_OBJ:T}
#
# Header file Directories
#
LCINCS = -I. \
-I$(SIMLIB) \
-I$(ROOT)/PR/include \
-I$(HDR)
GCINCS =
#
# Linker Directories and Options
#
LLDOPTS = -L. -L$(SIMLIB)
GLDOPTS =
LLDLIBS = -lsimlib -lgl -limage
LNFLAGS = $(CFLAGS)
#
# Default Targets
#
LDIRT = tctm tctm_0.c
default install rtests: tctm input_tab_files $(_FORCE)
if test -n "$(USE_HW_ROOT)"; then \
(cd $(OUTDATA); make HW=hw; cd ..); \
else \
(cd $(OUTDATA); make HW=hw2; cd ..); \
fi
stests: input_tab_files $(WIR)/tctm.1 $(_FORCE)
@if test -n "$(USE_HW_ROOT)"; then \
(cd $(OUTDATA); make HW=hw stests; cd ..); \
else \
(cd $(OUTDATA); make HW=hw2 stests; cd ..); \
fi
qtests: $(_FORCE)
@if test -n "$(USE_HW_ROOT)"; then \
(cd $(QSIM); make HW=hw; cd ..); \
else \
(cd $(QSIM); make HW=hw2; cd ..); \
fi
input_tab_files: $(FORCE)
(cd $(INDATA); make; cd ..)
$(COMMONTARGS): $(COMMONPREF)$$@
$(SUBDIRS_MAKERULE)
#
# SGI Common Rules
#
include $(COMMONRULES)
#
# Target for creating all .1 files, Viewlogic netlists
#
$(WIR)/tctm.1: $(FORCE)
cd $(WIR); $(MAKE)
#
# Compile 'C' processes
#
tctm_0.c: $(WIR)/tctm.1 $(WIR)/tctm.sym tctm.config $(XNET)
$(XNET) -d $(WIR) tctm -c tctm.config
tctm: tctm_0.c $(SIMLIB) $(TEST_OBJS)
$(HOST_CC) $(TEST_OBJS) $(LDFLAGS) -o $@ $(LLDLIBS)
#
# Compile Verilog processes. Note that Verilog sources needed by
# this process are specified explicitly $(VSRCS). Also a modified
# version of compile.vcs is used that links in the simlib and includes
# definitions of the PLI routines used in gmisc.c. You should use
# ../tools/simulate.vcs to start the verilog process.
#
#demo1_0.c: wir/demo1.1 demo1.config $(XNET)
# $(XNET) -d wir demo1 -c demo1.config
#
#demo1_0: demo1_0.o $(DEPLIBS)
# $(HOST_CC) $@.o $(LDFLAGS) -o $@
#
#demo1_16.v: wir/demo1.1 demo1.config $(XNET)
# $(XNET) -d wir demo1 -c demo1.config
#
#demo1_16: demo1_16.v $(VSRCS) $(DEPLIBS)
# ../tools/compile.vcs $@.v $(VSRCS)
# mv sgicom/simv.asd $@
#
# Targets
#
tests: test014 test015 test016 test017 test018 test019 test020 test021 test022 test023
SHOWRESULTS = izoom $@ $@-zoom10.rgb 10 10 -i ; ipaste $@-zoom10.rgb &
nuke:
- rm OutRgb/* RawData/* TmemData/auto* $(INDATA)/inp000.tab $(INDATA)/inp001.tab InData/inp002.tab InData/inp003.tab $(OUTDATA)/tc_lod/tc_lodtest* $(OUTDATA)/tc_tilemem/tc_tilemem* 2> /dev/null
#
# Tab targets
#
$(INDATA)/inp000.tab $(INDATA)/inp001.tab $(INDATA)/inp002.tab $(INDATA)/inp003.tab $(INDATA)/inp011.tab $(INDATA)/inp012.tab $(INDATA)/inp013.tab $(INDATA)/inp014.tab $(INDATA)/inp015.tab $(INDATA)/inp016.tab:
cd $(INDATA); make `basename $@`
#
# Raw Targets
#
$(RAWDATA)/raw000.raw: $(INRGB)/ab.rgb
$(RGB2C) -m abRGBA32 -f RGBA -s 32 -o RAW $(INRGB)/ab.rgb > $@
$(RAWDATA)/raw001.raw: $(INRGB)/tree.rgba
$(RGB2C) -m treeRGBA -f RGBA -s 32 -o RAW $(INRGB)/tree.rgba > $@
$(RAWDATA)/raw002.raw: $(INRGB)/tree.rgba
$(RGB2C) -m tree16 -f CI -s 4 -o RAW $(INRGB)/tree.rgba > $@
$(RAWDATA)/raw003.raw: $(INRGB)/tree.rgba
$(RGB2C) -m tree256 -f CI -s 8 -o RAW $(INRGB)/tree.rgba > $@
$(RAWDATA)/raw004.raw: $(INRGB)/wyen.rgb
$(RGB2C) -m wyen -f RGBA -s 16 -o RAW $(INRGB)/wyen.rgb > $@
#
# Tmem Targets
#
TMEMTARGET = `dirname $@`/`basename $@ .tmem`
$(TMEMDATA)/auto000.tmem: $(RAWDATA)/raw001.raw
$(TMEMFMT) -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto001.tmem: $(RAWDATA)/raw002.raw
$(TMEMFMT) -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto002.tmem: $(RAWDATA)/raw003.raw
$(TMEMFMT) -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto003.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto004.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -l 0 -r 15 -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto005.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -l 16 -r 31 -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto006.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -l 0 -r 15 -b 16 -t 31 -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto007.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -l 16 -r 31 -b 16 -t 31 -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto008.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -l 0 -r 15 -b 0 -t 15 -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto009.tmem: $(RAWDATA)/raw000.raw
$(TMEMFMT) -l 16 -r 31 -b 0 -t 15 -i $? -o $(TMEMTARGET)
$(TMEMDATA)/auto010.tmem: $(RAWDATA)/raw004.raw
$(TMEMFMT) -i $? -o $(TMEMTARGET)
#
# Test Targets
#
#test000 64x64 result
test000: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test000.rgb: $(TMEMDATA)/auto000.tmem $(TILEDATA)/tile000.dat $(INDATA)/inp003.tab tctm
tctm -i 3 -t $(TMEMDATA)/auto000.tmem -s $(TILEDATA)/tile000.dat -f $@ -x 64 -y 64
$(SHOWRESULTS)
test001: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test001.rgb: $(TMEMDATA)/auto000.tmem $(TILEDATA)/tile000.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto000.tmem -s $(TILEDATA)/tile000.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test002: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test002.rgb: $(TMEMDATA)/auto001.tmem $(TILEDATA)/tile002.dat $(INDATA)/inp002.tab tctm
tctm -i 2 -t $(TMEMDATA)/auto001.tmem -s $(TILEDATA)/tile002.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test003: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test003.rgb: $(TMEMDATA)/auto002.tmem $(TILEDATA)/tile003.dat $(INDATA)/inp002.tab tctm
tctm -i 2 -t $(TMEMDATA)/auto002.tmem -s $(TILEDATA)/tile003.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test004: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test004.rgb: $(TMEMDATA)/hand001.tmem $(TILEDATA)/tile002.dat $(INDATA)/inp002.tab tctm
tctm -i 2 -t $(TMEMDATA)/hand001.tmem -s $(TILEDATA)/tile002.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test005: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test005.rgb: $(TMEMDATA)/hand002.tmem $(TILEDATA)/tile003.dat $(INDATA)/inp002.tab tctm
tctm -i 2 -t $(TMEMDATA)/hand002.tmem -s $(TILEDATA)/tile003.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test006: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test006.rgb: $(TMEMDATA)/hand003.tmem $(TILEDATA)/tile003.dat $(INDATA)/inp002.tab tctm
tctm -i 2 -t $(TMEMDATA)/hand003.tmem -s $(TILEDATA)/tile003.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test007: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test007.rgb: $(TMEMDATA)/auto003.tmem $(TILEDATA)/tile000.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto003.tmem -s $(TILEDATA)/tile000.dat -f $@ -x 32 -y 32
$(SHOWRESULTS)
test008: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test008.rgb: $(TMEMDATA)/auto004.tmem $(TILEDATA)/tile004.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto004.tmem -s $(TILEDATA)/tile004.dat -f $@ -x 16 -y 32
$(SHOWRESULTS)
test009: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test009.rgb: $(TMEMDATA)/auto005.tmem $(TILEDATA)/tile004.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto005.tmem -s $(TILEDATA)/tile004.dat -f $@ -x 16 -y 32
$(SHOWRESULTS)
test010: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test010.rgb: tctm $(TMEMDATA)/auto006.tmem $(TILEDATA)/tile004.dat $(INDATA)/inp000.tab
tctm -i 0 -t $(TMEMDATA)/auto006.tmem -s $(TILEDATA)/tile004.dat -f $@ -x 16 -y 16
$(SHOWRESULTS)
test011: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test011.rgb: $(TMEMDATA)/auto007.tmem $(TILEDATA)/tile004.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto007.tmem -s $(TILEDATA)/tile004.dat -f $@ -x 16 -y 16
$(SHOWRESULTS)
test012: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test012.rgb: $(TMEMDATA)/auto008.tmem $(TILEDATA)/tile004.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto008.tmem -s $(TILEDATA)/tile004.dat -f $@ -x 16 -y 16
$(SHOWRESULTS)
test013: $(OUTRGB)/$$@.rgb
$(OUTRGB)/test013.rgb: $(TMEMDATA)/auto009.tmem $(TILEDATA)/tile004.dat $(INDATA)/inp000.tab tctm
tctm -i 0 -t $(TMEMDATA)/auto009.tmem -s $(TILEDATA)/tile004.dat -f $@ -x 16 -y 16
$(SHOWRESULTS)
test014: $(OUTDATA)/tc_lod/tc_lod014.tab $(OUTDATA)/tex/tex014.tab
$(OUTDATA)/tc_lod/tc_lod014.tab $(OUTDATA)/tex/tex014.tab: $(INDATA)/inp015.tab $(INDATA)/inp016.tab $(INDATA)/inp004.tab tctm
tctm -i 15,16,4 -o lod,tex,test=014
test015: $(OUTDATA)/tc_tilemem/tc_tilemem015.tab
$(OUTDATA)/tc_tilemem/tc_tilemem015.tab: $(INDATA)/inp005.tab $(INDATA)/inp015.tab tctm
tctm -i 15,5 -o tilemem,test=015
test016: $(OUTDATA)/tc_div/tc_div016.tab
$(OUTDATA)/tc_div/tc_div016.tab: $(INDATA)/inp006.tab $(INDATA)/inp006.tab $(INDATA)/inp014.tab $(INDATA)/inp015.tab tctm
tctm -i 15,6,14 -o div,test=016
test017: $(OUTDATA)/tc_adj/tc_adj017.tab
$(OUTDATA)/tc_adj/tc_adj017.tab: $(INDATA)/inp015.tab $(INDATA)/inp007.tab tctm
tctm -i 15,7 -o adj,test=017
test018: $(OUTDATA)/tc_frac/tc_frac018.tab $(OUTDATA)/tex/tex018.tab
$(OUTDATA)/tc_frac/tc_frac018.tab $(OUTDATA)/tex/tex018.tab: $(INDATA)/inp015.tab $(INDATA)/inp008.tab tctm
tctm -i 15,8 -o frac,tex,test=018
test019: $(OUTDATA)/tc_adrs/tc_adrs019.tab $(OUTDATA)/tc_sort/tc_sort019.tab
$(OUTDATA)/tc_adrs/tc_adrs019.tab $(OUTDATA)/tc_sort/tc_sort019.tab: $(INDATA)/inp015.tab $(INDATA)/inp009.tab tctm
tctm -i 15,9 -o adrs,sort,test=019
test020: $(OUTDATA)/tc_sort/tc_sort020.tab $(OUTDATA)/tex/tex020.tab
$(OUTDATA)/tc_sort/tc_sort020.tab $(OUTDATA)/tex/tex020.tab: $(INDATA)/inp015.tab $(INDATA)/inp011.tab $(INDATA)/inp010.tab tctm
tctm -i 15,11,10 -o sort,tex,test=020
test021: $(OUTDATA)/tc_sort/tc_sort021.tab $(OUTDATA)/tm_load/tm_load021.tab
$(OUTDATA)/tc_sort/tc_sort021.tab $(OUTDATA)/tm_load/tm_load021.tab: $(INDATA)/inp011.tab $(INDATA)/inp015.tab tctm
tctm -i 15,11 -o sort,load,test=021
test022: $(OUTDATA)/tc_sort/tc_sort022.tab $(OUTDATA)/tm_load/tm_load022.tab $(OUTDATA)/tm_mux/tm_mux022.tab $(OUTDATA)/tex/tex022.tab
$(OUTDATA)/tc_sort/tc_sort022.tab $(OUTDATA)/tm_load/tm_load022.tab $(OUTDATA)/tm_mux/tm_mux022.tab $(OUTDATA)/tex/tex022.tab: $(INDATA)/inp015.tab $(INDATA)/inp011.tab $(INDATA)/inp012.tab tctm
tctm -i 15,11,12 -o sort,load,mux,tex,test=022
test023: $(OUTDATA)/tc_sort/tc_sort023.tab $(OUTDATA)/tm_mux/tm_mux023.tab $(OUTDATA)/tex/tex023.tab
$(OUTDATA)/tc_sort/tc_sort023.tab $(OUTDATA)/tm_mux/tm_mux023.tab $(OUTDATA)/tex/tex023.tab : $(INDATA)/inp015.tab $(INDATA)/inp011.tab $(INDATA)/inp013.tab tctm
tctm -i 15,11,13 -o sort,mux,tex,test=023