initialize.c
1.89 KB
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#include <R4300.h>
#include <rcp.h>
#include <ramrom.h>
#include "osint.h"
#include "rdb.h"
typedef struct {
unsigned int inst1; /* lui k0,XXXX */
unsigned int inst2; /* addiu k0,k0,XXXX */
unsigned int inst3; /* jr k0 */
unsigned int inst4; /* nop */
} __osExceptionVector;
u64 osClockRate = 62500000LL;
s32 __osShutdown = 0; /* 1 = pre-NMI interrupt has occured */
#ifdef _FINALROM
s32 __osFinalrom;
#endif
void
osInitialize(void)
{
u32 pifdata;
u32 clock = 0;
/*
* Turn on FS bit to flush denormalized number to zero;
* enable "invalid operation" faulting to catch generation of NaNs.
*/
#ifdef _FINALROM
__osFinalrom = 1;
#endif
__osSetSR(__osGetSR() | SR_CU1);
__osSetFpcCsr(FPCSR_FS | FPCSR_EV);
#ifndef _HW_VERSION_1
/* send flag to PIF to enable NMI */
while(__osSiRawReadIo(PIF_RAM_START+0x3c, &pifdata));
while (__osSiRawWriteIo(PIF_RAM_START+0x3c, pifdata|8));
#endif
*(__osExceptionVector *)UT_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
*(__osExceptionVector *)XUT_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
*(__osExceptionVector *)ECC_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
*(__osExceptionVector *)E_VEC =
*(__osExceptionVector *)__osExceptionPreamble;
osWritebackDCache((void*)UT_VEC,
E_VEC - UT_VEC + sizeof(__osExceptionVector));
osInvalICache((void*)UT_VEC,
E_VEC - UT_VEC + sizeof(__osExceptionVector));
/* set TLB for the debug port */
/* Global, 4K page, even-page only */
osMapTLBRdb();
*((vu32 *) RDB_WRITE_INTR_REG) = 0;
*((vu32 *) RDB_READ_INTR_REG) = 0;
/* Get clock rate from rom hader */
osPiRawReadIo((u32)RAMROM_CLOCKRATE_OFFSET, (u32 *)&clock);
clock = clock & RAMROM_CLOCKRATE_MASK;
if (clock)
osClockRate = (u64) clock;
osClockRate = (osClockRate * 3) / 4;
/* zero out the NMI buffer if cold reset */
if (osResetType == 0) {
bzero(osAppNMIBuffer, OS_APP_NMI_BUFSIZE);
}
}