if_logic.ss
595 Bytes
module = if_logic
search_path = search_path + "../src" + "../../inc" + \
"../../../lib/verilog/user" + "../../syn"
/* read the compiled netlists */
read -f edif if_logic.edf_p
read -f edif ../ai/syn/ai.edf
read -f edif ../ar/syn/arb.edf
read -f edif ../si/syn/si.edf
read -f edif ../mi/syn/mi.edf
current_design = if_logic
link
check_design > if_logic.lint
ungroup -all -flatten
/* enforce naming restrictions for Compass tools */
change_names -rules compass_rules -hierarchy
/* standard reports & netlist */
include "report.dc"
write -f edif -o if_logic.edf -hier if_logic
quit