rcp_tab.v
16.4 KB
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////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: rcp_tab.v
// description: dumps out rcp i/o .tab file
//
// designer: Tony DeLaurier
// date: 12/23/94
//
////////////////////////////////////////////////////////////////////////
module rcp_tab();
integer tab_file_ptr;
reg [1:256*8] rcp_tab_fn;
// open tab file and dump header
initial begin
if ($getstr$plusarg("rcp_tab=", rcp_tab_fn) == 1)
tab_file_ptr = $fopen(rcp_tab_fn);
else
tab_file_ptr = $fopen("rcp000.tab");
// dump out header
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "# rcp tab file");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "clock_2 @DC 1(1) 0(1)");
$fdisplayh(tab_file_ptr, "clock_8 @DC 1(4) 0(4)");
$fdisplayh(tab_file_ptr, "clock_16 @DC 1(8) 0(8)");
$fdisplayh(tab_file_ptr, "tx_clk @C 1(2) 0(2)");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "reset_l_pad @I @E 1 @C clock_16");
$fdisplayh(tab_file_ptr, "test_pad @I @E 1 @C clock_16");
$fdisplayh(tab_file_ptr, "p_valid_pad @I @E 1 @C clock_16");
$fdisplayh(tab_file_ptr, "v_ref @I @E 1 @C clock_16");
$fdisplayh(tab_file_ptr, "c_ctl_pgm @I @E 1 @C clock_16");
$fdisplayh(tab_file_ptr, "pif_rsp_pad @I @E 1 @C clock_16");
$fdisplayh(tab_file_ptr, "# ");
$fdisplayh(tab_file_ptr, "mclock_pad @O @S 7 @C clock_8");
$fdisplayh(tab_file_ptr, "e_valid_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "e_ok_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "int_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "rx_clk @O @S 1.99 @C clock_2");
$fdisplayh(tab_file_ptr, "ad16_aleh_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_alel_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_read_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_write_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "pif_cmd_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "pif_clock_pad @O @S 15 @C clock_16 @V dv");
$fdisplayh(tab_file_ptr, "abus_data_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "abus_word_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "abus_clock_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[6] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[5] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[4] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[3] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[2] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[1] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_data_pad[0] @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "vbus_sync_pad @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "sys_ad_pad[31] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[30] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[29] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[28] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[27] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[26] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[25] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[24] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[23] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[22] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[21] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[20] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[19] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[18] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[17] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[16] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[15] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[14] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[13] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[12] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[11] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[10] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[9] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[8] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[7] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[6] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[5] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[4] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[3] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[2] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[1] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad[0] @B sys_ad_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad_oen @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_ad_pad_dummy @I @E 0 @C clock_16");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "sys_cmd_pad[4] @B sys_cmd_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_cmd_pad[3] @B sys_cmd_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_cmd_pad[2] @B sys_cmd_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_cmd_pad[1] @B sys_cmd_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_cmd_pad[0] @B sys_cmd_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_cmd_pad_oen @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "sys_cmd_pad_dummy @I @E 0 @C clock_16");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "ad16_data_pad[15] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[14] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[13] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[12] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[11] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[10] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[9] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[8] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[7] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[6] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[5] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[4] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[3] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[2] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[1] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad[0] @B ad16_data_pad_oen 0 @E 5 @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad_oen @O @S 15 @C clock_16");
$fdisplayh(tab_file_ptr, "ad16_data_pad_dummy @I @E 0 @C clock_16");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "vclk_pad @B vclk_pad_oen 0 @E 0 @S 7 @C clock_8");
$fdisplayh(tab_file_ptr, "vclk_pad_oen @O @S 7 @C clock_8");
$fdisplayh(tab_file_ptr, "vclk_pad_dummy @I @E 0 @C clock_8");
$fdisplayh(tab_file_ptr, "# rambus interface");
$fdisplayh(tab_file_ptr, "bus_ctrl_rac_i @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[8] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[7] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[6] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[5] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[4] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[3] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[2] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[1] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_i[0] @I @E 1 @C clock_2");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "bus_enable_rac @O @S 1.99 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_ctrl_rac_o @O @S 1.99 @C clock_2");
$fdisplayh(tab_file_ptr, "bus_data_rac_o[8:0] @O @S 1.99 @C clock_2");
$fdisplayh(tab_file_ptr, "#");
$fdisplayh(tab_file_ptr, "dv @V @C clock_16");
$fdisplayh(tab_file_ptr, "");
end // initial
// determine data valids
reg dv;
reg dv_clk;
reg reset_l_1d;
reg reset_l_2d;
initial
begin
dv <= 0;
reset_l_1d <= 0;
reset_l_2d <= 0;
dv_clk <= 1;
forever
begin
`ifdef BUSCLK_3NS
#6 dv_clk = ~dv_clk;
`else
#8 dv_clk = ~dv_clk;
`endif
end // forever
end
always @(posedge dv_clk)
begin
if ((reality.rcp_0.reset_l_0 === 1'b1) || (reality.rcp_0.reset_l_0 === 1'b0))
begin
reset_l_1d <= reality.rcp_0.reset_l_0;
reset_l_2d <= reset_l_1d;
end
dv <= (reset_l_2d && !reset_l_1d) || dv;
end
// generate sample clk
reg smp_clk;
initial
begin
smp_clk = 1;
`ifdef BUSCLK_3NS
#1.4 smp_clk = 0;
`else
#1.9 smp_clk = 0;
`endif
forever
begin
`ifdef BUSCLK_3NS
#1.5 smp_clk = ~smp_clk;
`else
#2 smp_clk = ~smp_clk;
`endif
end // forever
end // initial
integer vector_count;
initial vector_count = 0;
always @(smp_clk) begin
if (vector_count >= 0) begin
if (!(vector_count % 8)) begin
$fdisplayh(tab_file_ptr, "# vector %0d", vector_count);
end
$fdisplayh(tab_file_ptr,
reality.reset_l,,
reality.test,,
reality.p_valid,,
reality.v_ref,,
reality.c_ctl_pgm,,
reality.pif_rsp,," ",
reality.clock,,
reality.e_valid,,
reality.e_ok,,
reality.int,,
reality.tx_clk,,
reality.ad16_aleh,,
reality.ad16_alel,,
reality.ad16_read,,
reality.ad16_write,,
reality.pif_cmd,,
reality.pif_clock,,
reality.abus_data,,
reality.abus_word,,
reality.abus_clock,,
reality.vbus_data[6],,
reality.vbus_data[5],,
reality.vbus_data[4],,
reality.vbus_data[3],,
reality.vbus_data[2],,
reality.vbus_data[1],,
reality.vbus_data[0],,
reality.vbus_sync,," ",
reality.sys_ad[31],,
reality.sys_ad[30],,
reality.sys_ad[29],,
reality.sys_ad[28],,
reality.sys_ad[27],,
reality.sys_ad[26],,
reality.sys_ad[25],,
reality.sys_ad[24],,
reality.sys_ad[23],,
reality.sys_ad[22],,
reality.sys_ad[21],,
reality.sys_ad[20],,
reality.sys_ad[19],,
reality.sys_ad[18],,
reality.sys_ad[17],,
reality.sys_ad[16],,
reality.sys_ad[15],,
reality.sys_ad[14],,
reality.sys_ad[13],,
reality.sys_ad[12],,
reality.sys_ad[11],,
reality.sys_ad[10],,
reality.sys_ad[9],,
reality.sys_ad[8],,
reality.sys_ad[7],,
reality.sys_ad[6],,
reality.sys_ad[5],,
reality.sys_ad[4],,
reality.sys_ad[3],,
reality.sys_ad[2],,
reality.sys_ad[1],,
reality.sys_ad[0],,
`ifdef GATE_LEVEL
reality.rcp_0.\sys_ad_enable_l[0] ,,
reality.rcp_0.\sys_ad_enable_l[0] ,," ",
`else
reality.rcp_0.sys_ad_enable_l[0],,
reality.rcp_0.sys_ad_enable_l[0],," ",
`endif
reality.sys_cmd[4],,
reality.sys_cmd[3],,
reality.sys_cmd[2],,
reality.sys_cmd[1],,
reality.sys_cmd[0],,
`ifdef GATE_LEVEL
reality.rcp_0.\sys_ad_enable_l[0] ,,
reality.rcp_0.\sys_ad_enable_l[0] ,," ",
`else
reality.rcp_0.sys_ad_enable_l[0],,
reality.rcp_0.sys_ad_enable_l[0],," ",
`endif
reality.ad16_data[15],,
reality.ad16_data[14],,
reality.ad16_data[13],,
reality.ad16_data[12],,
reality.ad16_data[11],,
reality.ad16_data[10],,
reality.ad16_data[9],,
reality.ad16_data[8],,
reality.ad16_data[7],,
reality.ad16_data[6],,
reality.ad16_data[5],,
reality.ad16_data[4],,
reality.ad16_data[3],,
reality.ad16_data[2],,
reality.ad16_data[1],,
reality.ad16_data[0],,
`ifdef GATE_LEVEL
reality.rcp_0.\tst_ad16_enable_l[0] ,,
reality.rcp_0.\tst_ad16_enable_l[0] ,," ",
`else
reality.rcp_0.tst_ad16_enable_l[0],,
reality.rcp_0.tst_ad16_enable_l[0],," ",
`endif
reality.vbus_clock,,
reality.rcp_0.vclk_enable_l,,
reality.rcp_0.vclk_enable_l,," ",
`ifdef RDRAM_1_PRESENT
"%s", reality.rdram_0.rdram_near_model_0.BusCtrl_drive & reality.rdram_1.rdram_near_model_0.BusCtrl_drive ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[8] & reality.rdram_1.rdram_near_model_0.BusData_drive[8] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[7] & reality.rdram_1.rdram_near_model_0.BusData_drive[7] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[6] & reality.rdram_1.rdram_near_model_0.BusData_drive[6] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[5] & reality.rdram_1.rdram_near_model_0.BusData_drive[5] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[4] & reality.rdram_1.rdram_near_model_0.BusData_drive[4] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[3] & reality.rdram_1.rdram_near_model_0.BusData_drive[3] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[2] & reality.rdram_1.rdram_near_model_0.BusData_drive[2] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[1] & reality.rdram_1.rdram_near_model_0.BusData_drive[1] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[0] & reality.rdram_1.rdram_near_model_0.BusData_drive[0] ? "z" : "0",," ",
`else
"%s", reality.rdram_0.rdram_near_model_0.BusCtrl_drive ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[8] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[7] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[6] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[5] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[4] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[3] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[2] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[1] ? "z" : "0",,
"%s", reality.rdram_0.rdram_near_model_0.BusData_drive[0] ? "z" : "0",," ",
`endif
reality.bus_enable,,
reality.bus_ctrl,,
"0x", reality.bus_data,," ",
dv,,
);
end // if
vector_count = vector_count + 1;
end // always
endmodule // rcp_tab