iotestri.c 4.33 KB

/*************************************************************************
 *
 *  File: iotestri.c
 *
 *  This file contains the routines to test RI and RDRAM.
 *
 *  $Header: /root/leakn64/depot/rf/sw/n64os20l/iosim/src/iotestri.c,v 1.2 2002/05/30 05:52:50 whs Exp $
 *
 */

#include <stdio.h>
#include <stdlib.h>
#include "trace.h"
#include "iomap.h"
#include "iotest.h"


/***********************************************************************
 * Routines
 */
int
rdramInit(int addr, int nwords, int pattern, int compared)
{
	/* Init RDRAM with random data */

	int i;
	unsigned int ret, data;

	errorCount = 0;
	addr &= 0xFFFFFFFC;	/* Address must be word-aligned */

	for (i = 0; i < nwords; i++) {
		/* data = rand(); */
		data = (addr+(i*4)) | pattern;
		IO_WRITE(addr+(i*4), data);
		if (compared) {
			ret = IO_READ(addr+(i*4));
			if (data != ret) {
				errorCount++;
				_TRACE(DERROR, LOG_ERROR(data, ret));
				_TRACE(DERROR, fprintf(LogFp,
					"\n\t****ERROR: addr=%08x, data=%08x\t",
					addr+(i*4), data));
			}  /* if */
		}  /* if */
	}  /* for */

	errorTotal += errorCount;
	return((errorCount == 0) ? 0 : -1);

}  /* rdramInit */


/***********************************************************************
 * Test routines for RDRAM
 */

/*
 * rdramTestSglRw
 *
 *	startAddr = starting RDRAM address to start this test 
 *	data      = array of 8 words to be used for testing
 */
int
rdramTestSglRw(int addr, int data, int type, int a4)
{
	unsigned int ret;

	errorCount = 0;

	/* Clear out the word and make sure address is word-aligned */
	IO_WRITE(addr & 0xFFFFFFFC, 0);

	/* Perform single write/read operation */

	switch (type) {
		case (1): {		/* 1-byte op */
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		case (2): {		/* 2-byte op */
			addr = addr & 0xFFFFFFFE;
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		case (3): {		/* 3-byte op ???? */
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		case (4): {		/* 4-byte op */
			addr = addr & 0xFFFFFFFC;
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		default: ret = -1;
	}

	_TRACE(DREAD|DWRITE, fprintf(FP_SET(dumpFp), 
		MSG_DATAOUT, addr, ret, 0, 0, 0, 0, 0, 0, 0));

	if (data != ret) {
		errorCount++;
		_TRACE(DERROR, LOG_ERROR(data, ret));
		_TRACE(DERROR, fprintf(LogFp,
		"\n\t****ERROR: W/R RDRAM: addr=%08x, data=%08x, ret=%08x\t",
			addr, data, ret));
	}  /* if */

	errorTotal += errorCount;

	return((errorCount == 0) ? 0 : -1);

}  /* rdramTestSglRw */


int
rdramTestBlkRw(int addr, int data, int type, int a4)
{
	unsigned int ret;

	errorCount = 0;

	/* Clear out the word and make sure address is word-aligned */
	IO_WRITE(addr & 0xFFFFFFFC, 0);

	/* Perform single write/read operation */

	switch (type) {
		case (2): {		/* 2-word op */
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		case (4): {		/* 4-word op */
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		case (8): {		/* 8-word op */
			IO_WRITE(addr, data);
			ret = IO_READ(addr);
			break;
		}
		default: ret = -1;
	}

	_TRACE(DREAD|DWRITE, fprintf(FP_SET(dumpFp), 
		MSG_DATAOUT, addr, ret, 0, 0, 0, 0, 0, 0, 0));

	if (data != ret) {
		errorCount++;
		_TRACE(DERROR, LOG_ERROR(data, ret));
		_TRACE(DERROR, fprintf(LogFp,
		"\n\t****ERROR: W/R RDRAM: addr=%08x, data=%08x, ret=%08x\t",
			addr, data, ret));
	}  /* if */

	errorTotal += errorCount;

	return((errorCount == 0) ? 0 : -1);

}  /* rdramTestBlkRw */


int
rdramTestPgRw(int startAddr, int data, int npages, int a4)
{
	int i, ret, startPg;
	unsigned int address;

	/* Perform a 4-byte write/read on every page of RDRAM 
	 * 2 RDRAMs: 1 RDRAM = 1 MBytes; 1 RDRAM = 2 banks;
	 *           1 bank = 256 pages; 1 page = 2 KBytes
	 */
	startPg = startAddr / RDRAM_PAGE_SIZE;
	i = MAX_RDRAM_PAGES - startPg;
	if (npages > i)
		npages = i;

	for (i = 0; i < npages; i++) {
		address = (startAddr + (i*RDRAM_PAGE_SIZE)) & 0xFFFFFFFC;
		data += i;
		IO_WRITE(address, data);
		ret = IO_READ(address);
		_TRACE(DREAD|DWRITE,
			fprintf(FP_SET(dumpFp), MSG_DATAOUT, address,
			ret, 0, 0, 0, 0, 0, 0, 0));
		if (data != ret) {
			errorCount++;
			_TRACE(DERROR, LOG_ERROR(data, ret));
			_TRACE(DERROR, fprintf(LogFp,
			"\n\t****ERROR: W/R RDRAM: page=%d, data=%08x\t\t",
				startPg+i, data));
		}  /* if */
	}  /* for */

	errorTotal += errorCount;

	return((errorCount == 0) ? 0 : -1);

}  /* rdramTestPgRw */