/************************************************************************\
 *                                                                        *
 *               Copyright (C) 1994, Silicon Graphics, Inc.               *
 *                                                                        *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright  law.  They  may not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *                                                                        *
 \************************************************************************/

//  This module inputs clk and outputs clock and gclock

`timescale 10ps/10ps    //1unit = 0.01ns

module gclock(clk, stop_gclock, clock, gclock);


input clk;
input stop_gclock;
output clock;
output gclock;

wire clk;
wire stop_gclock;
wire clock;
wire gclock;

assign        clock  = clk;
assign        gclock = clk | stop_gclock;

endmodule