disasm.c
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
/*
* File: disasm.c
* Creator: hsa@sgi.com
* Create Date: Fri Feb 11 13:20:04 PST 1994
*
* This file has some functions to disassemble an instruction.
*
* Compile this with -DDUMPMODE and it generates a stand-alone program
* that will printout the opcode syntax for each op.
*
*/
#include <stdio.h>
#include "rsp.h"
#include "opcode.h"
#include "disasm.h"
unsigned int regsUsed;
/*
* search op table for a match:
* 'first' field skips parts of the table to avoid duplicate codes.
*
*/
static rsp_disOp_t *
find_op(int opKey, char *first)
{
rsp_disOp_t *tp = &(rsp_disOpTable[0]);
/* skip first part (SPECIAL/REGIMM/COP re-use codes) */
while (strcmp(first, tp->opString) != 0)
tp++;
/* find the right one: */
while( (tp->opKey != rsp_FINALOP) && (tp->opKey != rsp_FIN) ) {
if (tp->opKey == opKey) {
return tp;
}
tp++;
}
return(NULL);
}
/*
* This little parser fills in the "template" for each
* op. It doesn't have to know anything about the instructions,
* the template encodes what fields to print out and how.
* Result returned in 'buf'
*/
static void
fill_template(char *temp, char *buf,
int rs, int rt, int rd, int sa, int immed, int target, int cur_pc )
{
char c, tmpbuf[32], *bp = buf, *tp;
int addr;
bzero(bp, 32); /* buf must be at least this big */
regsUsed = 0;
while ((c = *temp++) != '\0') {
if (c == '%') {
c = *temp++;
switch (c) {
case 's': /* %s - replace with 5-bit source (or base) register */
#ifdef DUMPMODE
sprintf(tmpbuf, "rs", rs);
#else
sprintf(tmpbuf, "%d", rs);
regsUsed |= (1 << rs);
#endif
break;
case 't': /* %t - replace with 5-bit target register */
#ifdef DUMPMODE
sprintf(tmpbuf, "rt", rt);
#else
sprintf(tmpbuf, "%d", rt);
regsUsed |= (1 << rt);
#endif
break;
case 'i': /* %i - replace with 16-bit immediate (offset) value */
#ifdef DUMPMODE
sprintf(tmpbuf, "immed", immed);
#else
sprintf(tmpbuf, "0x%04x", immed);
#endif
break;
case 'I': /* %I - replace with 16-bit immediate (offset) value */
#ifdef DUMPMODE
sprintf(tmpbuf, "immed", immed); /* decimal number */
#else
sprintf(tmpbuf, "%d", immed); /* decimal number */
#endif
break;
case 'O': /* %O - replace with 16-bit offset value */
#ifdef DUMPMODE
sprintf(tmpbuf, "offset", immed); /* decimal number */
#else
sprintf(tmpbuf, "%d", immed); /* decimal number */
#endif
break;
case 'o': /* %o - replace with 16-bit offset value + cur address */
#ifdef DUMPMODE
sprintf(tmpbuf, "offset", immed); /* hex address */
#else
addr = (4*immed) + cur_pc+4;
sprintf(tmpbuf, "0x%03x", addr & 0xffc);/* hex address */
#endif
break;
case 'a': /* %a - replace with 26-bit target address */
#ifdef DUMPMODE
sprintf(tmpbuf, "targ", target);
#else
sprintf(tmpbuf, "0x%08x", 0x04001000 + ((target&0x3ff)<<2));
#endif
break;
case 'd': /* %d - replace with 5-bit destination register */
#ifdef DUMPMODE
sprintf(tmpbuf, "rd", rd);
#else
sprintf(tmpbuf, "%d", rd);
regsUsed |= (1 << rd);
#endif
break;
case 'h': /* %h - replace with 5-bit shift amount */
#ifdef DUMPMODE
sprintf(tmpbuf, "sa", sa);
#else
sprintf(tmpbuf, "%d", sa);
#endif
break;
case 'e': /* %e - replace with 3-bit element */
#ifdef DUMPMODE
sprintf(tmpbuf, "e", sa);
#else
sprintf(tmpbuf, "%d", sa); /* re-use sa field */
#endif
break;
case 'l': /* %l - replace with 3-bit (load/store) element */
#ifdef DUMPMODE
sprintf(tmpbuf, "e", sa);
#else
sprintf(tmpbuf, "%d", sa); /* re-use sa field */
#endif
break;
case 'f': /* %f - replace with 6-bit function code */
/* not used... */
break;
}
tp = &(tmpbuf[0]);
while (*tp != '\0')
*bp++ = *tp++;
} else {
*bp++ = c;
}
}
}
/*
* dis-assemble an instruction and return a readable string
* in the buffer 'buf'
*/
void
rsp_DisasmInst(u32 inst, char *buf, int pc)
{
rsp_disOp_t *opDisasm;
int opKey, rs, rt, rd, sa, target;
short int immed;
char tmpbuf[32];
opKey = ExtractOpcode(inst);
switch (opKey) {
case rsp_SPECIAL:
opKey = ExtractBits(inst, 5, 0);
opDisasm = find_op(opKey, "add");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (SPECIAL)");
return;
}
/* SPECIAL instructions are all R-Type */
rs = ExtractBits(inst, 25, 21);
rt = ExtractBits(inst, 20, 16);
rd = ExtractBits(inst, 15, 11);
sa = ExtractBits(inst, 10, 6);
fill_template(opDisasm->cmdFormat, buf, rs, rt, rd, sa, 0, 0, pc);
if (inst == 0x00000000) {
sprintf(buf,"nop "); /* special case */
}
break;
case rsp_REGIMM:
opKey = ExtractBits(inst, 20, 16);
opDisasm = find_op(opKey, "bltz");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (REGIMM)");
return;
}
/* REGIMM instructions are all I-Type */
rs = ExtractBits(inst, 25, 21);
rt = ExtractBits(inst, 20, 16);
immed = ExtractBits(inst, 15, 0);
fill_template(opDisasm->cmdFormat, buf, rs, rt, 0, 0, immed, 0, pc);
break;
case rsp_COP0:
opKey = ExtractBits(inst, 25, 21);
switch (opKey) {
case rsp_MFC0:
case rsp_MTC0:
opDisasm = find_op(opKey, "mfc0");
rt = ExtractBits(inst, 20, 16);
rd = ExtractBits(inst, 15, 11);
fill_template(opDisasm->cmdFormat, buf, 0, rt, rd, 0, 0, 0, pc);
break;
case rsp_BC0:
opKey = ExtractBits(inst, 20, 16);
if (opKey)
opDisasm = find_op(rsp_BC0, "bc0t");
else
opDisasm = find_op(rsp_BC0, "bc0f");
immed = ExtractBits(inst, 15, 0);
fill_template(opDisasm->cmdFormat, buf, 0, 0, 0, 0, immed, 0, pc);
break;
default:
sprintf(buf,"%s","BAD OP (COP0)");
break;
}
break;
case rsp_COP2:
opKey = ExtractBits(inst, 25, 21);
if (opKey & 0x10) { /* bit 25 is set */
opKey = ExtractBits(inst, 5, 0);
opDisasm = find_op(opKey, "vmulf");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (COP2)");
return;
}
rs = ExtractBits(inst, 15, 11);
rt = ExtractBits(inst, 20, 16);
rd = ExtractBits(inst, 10, 6);
sa = ExtractBits(inst, 24, 21); /* element */
if ((opKey & 0x38) == 0x38) { /* a pack instruction... */
switch (sa) {
case 0x01:
sa = 0;
break;
case 0x02:
sa = 1;
break;
case 0x04:
sa = 2;
break;
case 0x08:
sa = 3;
break;
default:
sprintf(buf,"%s","BAD OP (VMUL)");
return;
}
#ifdef DIV_DIFF
} else
if ((opKey & 0x38) == 0x30) { /* an rcp instruction... */
rs &= 0x07;
sa &= 0x07;
tmpbuf[0] = '\0';
#endif
} else {
if ((opKey & 0x38) == 0x30) /* an rcp instruction... */
rs &= 0x07;
if((opKey == rsp_VADDB) ||
(opKey == rsp_VSUBB) ||
(opKey == rsp_VACCB) ||
(opKey == rsp_VSUCB) ) {
sa &= 7;
sa += 8;
}
if (opKey == rsp_VSAW) { /* Actually VSAR */
sa &= 3;
if( sa == 3 ) {
sprintf(buf,"%s","BAD OP (VSAR [3])");
return;
};
sa += 8;
};
if (sa >= 8) { /* 1 of 8 elements of whole */
sa &= 0x07;
sprintf(tmpbuf,"[%d]",sa);
} else if (sa >= 4) { /* 1 of 4 elements of half */
sa &= 0x03;
sprintf(tmpbuf,"[%dh]",sa);
} else if (sa >= 2) { /* 1 of 2 elements of quarter */
sa &= 0x01;
sprintf(tmpbuf,"[%dq]",sa);
} else {
/* vector operand, no element */
tmpbuf[0] = '\0';
}
}
fill_template(opDisasm->cmdFormat, buf, rs, rt, rd, sa, 0, 0, pc);
if ((opKey & 0x38) != 0x38) /* not a pack instruction... */
strcat(buf, tmpbuf);
} else { /* su cop2 instruction */
opDisasm = find_op(opKey, "mfc2");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (SU COP2)");
return;
}
rt = ExtractBits(inst, 20, 16);
rd = ExtractBits(inst, 15, 11);
sa = ExtractBits(inst, 10, 7);
switch (opKey) {
case rsp_MFC2:
case rsp_MTC2:
fill_template(opDisasm->cmdFormat, buf, 0, rt, rd, sa, 0, 0, pc);
break;
case rsp_CFC2:
case rsp_CTC2:
fill_template(opDisasm->cmdFormat, buf, 0, rt, rd, sa, 0, 0, pc);
if( (rd&0x3) == 0 )
strcat( buf, "VCO" );
else if( (rd&0x3) == 1 )
strcat( buf, "VCC" );
else if( (rd&0x3) == 2 )
strcat( buf, "VCE" );
else
if( opKey == rsp_CFC2 )
sprintf(buf,"BAD OP (CFC2 %d)", rd);
else
{
char tmpbuf[80];
sprintf( tmpbuf, "NOP(%d)", rd );
strcat( buf, tmpbuf );
};
break;
default:
sprintf(buf,"%s","BAD OP (COP2)");
break;
}
}
break;
case rsp_LWC2:
opKey = ExtractBits(inst, 15, 11);
opDisasm = find_op(opKey, "lbv");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (SU LOAD COP2)");
return;
}
rs = ExtractBits(inst, 25, 21);
rt = ExtractBits(inst, 20, 16);
sa = ExtractBits(inst, 10, 7);
immed = ExtractBits(inst, 6, 0);
#define SignExtend(x,len) ((((int)(x))<<(32-(len)))>>(32-(len)))
immed = SignExtend( immed, 7 );
switch (opDisasm->opString[1]) {
case 'b':
break;
case 's':
immed <<= 1;
break;
case 'l':
immed <<= 2;
break;
case 'd':
case 'p':
case 'u':
case 'a':
immed <<= 3;
break;
case 'q':
case 'r':
case 'h':
case 'f':
case 't':
case 'w':
immed <<= 4;
break;
}
fill_template(opDisasm->cmdFormat, buf, rs, rt, 0, sa, immed, 0, pc);
break;
case rsp_SWC2:
opKey = ExtractBits(inst, 15, 11);
opDisasm = find_op(opKey, "sbv");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (SU STORE COP2)");
return;
}
rs = ExtractBits(inst, 25, 21);
rt = ExtractBits(inst, 20, 16);
sa = ExtractBits(inst, 10, 7);
immed = ExtractBits(inst, 6, 0);
switch (opDisasm->opString[1]) {
case 'b':
break;
case 's':
immed <<= 1;
break;
case 'l':
immed <<= 2;
break;
case 'd':
case 'p':
case 'u':
case 'a':
immed <<= 3;
break;
case 'q':
case 'h':
case 'f':
case 't':
immed <<= 4;
break;
}
fill_template(opDisasm->cmdFormat, buf, rs, rt, 0, sa, immed, 0, pc);
break;
case rsp_J: case rsp_JAL:
case rsp_BEQ: case rsp_BNE: case rsp_BLEZ: case rsp_BGTZ:
case rsp_ADDI: case rsp_ADDIU:
case rsp_SLTI: case rsp_SLTIU:
case rsp_ANDI: case rsp_ORI:
case rsp_XORI: case rsp_LUI:
case rsp_LB: case rsp_LBU:
case rsp_LH: case rsp_LHU:
case rsp_LW:
case rsp_SB: case rsp_SH: case rsp_SW:
opDisasm = find_op(opKey, "special");
if (opDisasm == (rsp_disOp_t *) NULL) {
sprintf(buf,"%s","BAD OP (REGULAR)");
return;
}
rs = ExtractBits(inst, 25, 21);
rt = ExtractBits(inst, 20, 16);
rd = ExtractBits(inst, 15, 11);
sa = ExtractBits(inst, 10, 6);
immed = ExtractBits(inst, 15, 0);
target = ExtractBits(inst, 25, 0);
fill_template(opDisasm->cmdFormat, buf, rs, rt, rd, sa, immed, target, pc);
break;
default:
sprintf(buf,"BAD OP (REGULAR opKey=0x%02x)", opKey);
break;
}
}
#ifdef DUMPMODE
/*
* Dump out all the opcodes and their syntax.
*
*/
int
main(int argc, char *argv[])
{
rsp_disOp_t *opDisasm = &(rsp_disOpTable[0]);
char buffer[80];
boolean firstV = TRUE;
while ((argc > 1) && (argv[1][0] == '-')) {
switch(argv[1][1]) {
}
argc--;
argv++;
}
fprintf(stdout,"\n\t\t\tRSP Instruction Set:\n");
fprintf(stdout,"\t\t\t%s %s\n\n",RSP_VERSION_DATE, RSP_VERSION_TIME);
while (opDisasm->opKey != rsp_FINALOP) {
fill_template(opDisasm->cmdFormat, buffer, 0, 0, 0, 0, 0, 0, 0);
if (buffer[0] == 'v' && firstV) {
fprintf(stdout,"\n\tRSP Vector Unit Operations:\n");
fprintf(stdout,"\tMost of these can have an element field for\n");
fprintf(stdout,"\tvrt also, which looks like $vrt[e]\n\n");
firstV = FALSE;
}
if (buffer[0] != '(')
fprintf(stdout," %s\t%s\n",buffer,opDisasm->helpString);
opDisasm++;
}
fprintf(stdout,"\n");
}
#endif