#!smake -k -J 3 # # Force smake to only batch three rules at a time; any more on a memory # constricted system, and the iosim jobs will run out of swap space. # # This makefile has rules for making both the executables # which make up the simulator, and for running test cases. # # The 'nightly_regression' target runs a set of test cases through the 'C' # simulator and the C & verilog simulator, then compares the resulting image # files. # # The 'nightly_iosim' target assumes that the 'C' simulator target # "nightly_rdp_c" has already been made, runs a suite of tests through the # all-verilog iosim based simulator, then compares the resulting image files. # It assumes that you have already built $ROOT/PR/iosim, and have run # "make ipc" in $ROOT/PR/hw/chip/sim with SIMVDIR set to # $ROOT/PR/rdpsim/test/rdp. # COMMONPREF=RDPSIM PRDEPTH = ../../.. ATTDEPTH = $(PRDEPTH)/apps/rdpatt/InData COVDEPTH = $(PRDEPTH)/apps/rdpcov/InData EWDEPTH = $(PRDEPTH)/apps/rdpew/InData TEXDEPTH = $(PRDEPTH)/apps/rdptex/InData MSDEPTH = $(PRDEPTH)/apps/rdpms/InData include $(PRDEPTH)/PRdefs include $(ROOT)/usr/include/make/ismcommondefs CVERSION= DUMPDIR = "./" # # User should set this # # SIMVDIR = "$(ROOT)/PR/hw2/chip/sim" # # 21600 = 6 hours # TIMELIMIT = 21600 # # Tools # HW = $(PRDEPTH)/hw2/chip/rcp HWLIB = $(PRDEPTH)/hw2/chip/lib/verilog TOOLS = $(PRDEPTH)/rdpsim/tools FILTER = $(ROOT)/PR/rdpsim/backend/filter RDRAM2RDP = $(TOOLS)/rdram2rdp # # User should set SIMVDIR # TESTIT = RDP_OPTS="$(RDP_OPTS)" ./testit -b -m # # Set RDP_OPTS on the command line to make if you want to provide a temporary # override for the simulators, or put it in your environment as a shell # variable. For example, both of the following achieve the same desired # result (getting the simulation to terminate in a hundred clocks): # # make OutData/test014_att_cf_0.rgb "RDP_OPTS= -c 100" # # or # # setenv RDP_OPTS = "-c 100"; make OutData/test014_att_cf_0.rgb # RDP_C = LD_LIBRARY_PATH=$(PRDEPTH)/lib/libimage rdp_c $(RDP_OPTS) RDP_CV = LD_LIBRARY_PATH=$(VCSDIR)/lib:$(PRDEPTH)/lib/libimage \ rdp_cv $(RDP_OPTS) # # Directories # SIMLIB = $(PRDEPTH)/rdpsim/simlib SRC = $(PRDEPTH)/rdpsim/src HDR = $(PRDEPTH)/rdpsim/hdr INCLUDE = $(PRDEPTH)/include WIR = Wir TMEM = TmemData INDATA = InData OUTDATA = OutData SUBDIRS = Wir InData OutData APP_RDPTEX = $(PRDEPTH)/apps/rdptex/InData APP_RDPATT = $(PRDEPTH)/apps/rdpatt/InData # # Check for objects in this directory # VPATH = $(SRC) # # C Sources # PROC0_FILES = \ $(SRC)/csclk.c \ $(SRC)/csgclk.c \ $(SRC)/bits_gram.c \ $(SRC)/at.c \ $(SRC)/ew.c \ rdp_c_mp_0.c PROC1_FILES = \ $(SRC)/cv.c \ $(SRC)/ep.c \ $(SRC)/st.c \ rdp_c_mp_1.c PROC2_FILES = \ $(SRC)/cc.c \ $(SRC)/bl.c \ $(SRC)/mspan.c \ display.c \ gl_dev.c \ rdp_c_mp_2.c PROC3_FILES = \ driver.c \ ms_ck.c \ expand.c \ $(SRC)/tc.c \ $(SRC)/tm.c \ $(SRC)/tf.c \ rdp_c_mp_3.c TEST_FILES = \ $(SRC)/csclk.c \ $(SRC)/csgclk.c \ $(SRC)/bits_gram.c \ $(SRC)/at.c \ $(SRC)/ew.c \ $(SRC)/cv.c \ $(SRC)/ep.c \ $(SRC)/st.c \ $(SRC)/cc.c \ $(SRC)/bl.c \ $(SRC)/tc.c \ $(SRC)/tm.c \ $(SRC)/tf.c \ $(SRC)/mspan.c \ driver.c \ ms_ck.c \ gl_dev.c \ rdp_c_0.c # # Object Files # PROC0_OBJ = ${PROC0_FILES:.c=.o} PROC0_OBJS = $(notdir ${PROC0_OBJ}) PROC1_OBJ = ${PROC1_FILES:.c=.o} PROC1_OBJS = $(notdir ${PROC1_OBJ}) PROC2_OBJ = ${PROC2_FILES:.c=.o} PROC2_OBJS = $(notdir ${PROC2_OBJ}) PROC3_OBJ = ${PROC3_FILES:.c=.o} PROC3_OBJS = $(notdir ${PROC3_OBJ}) TEST_OBJ = ${TEST_FILES:.c=.o} TEST_OBJS = $(notdir ${TEST_OBJ}) # # RDP_CV C Source files # RDP_CV_C_FILES = \ $(SRC)/mspan.c \ ./driver.c \ ./gl_dev.c \ ./ms_ck.c \ $(SRC)/tm.c \ rdp_v_0.c # # Object Files # RDP_CV_C_OBJ = ${RDP_CV_C_FILES:.c=.o} RDP_CV_C_OBJS = $(notdir ${RDP_CV_C_OBJ}) # # Header file Directories # LCINCS = -g -I. \ -I$(SIMLIB) \ -I$(HDR) -I$(INCLUDE) -I$(ROOT)/host_include \ -I/usr/X11R6/include GCINCS =-D_LANGUAGE_C #LCOPTS = -DDEBUG # # Linker Directories and Options # LLDOPTS = -L. -L$(SIMLIB) GLDOPTS = -L$(ROOT)/host_lib #LLDLIBS = -lsimlib -lgl -limage LLDLIBS = -lsimlib -limage -L/usr/X11R6/lib -lX11 LNFLAGS = $(CFLAGS) # # VCS options # -q \ # -y $(HW)/rdp/src \ # LVCSOPTS = \ -notice \ +define+MMAP_RDRAM+ \ -y . \ -y $(HW)/../sim \ -y $(HW)/src \ -y $(HW)/rdp/src \ -y $(HW)/cs/src \ -y $(HW)/ew/src \ -y $(HW)/cv/src \ -y $(HW)/ep/src \ -y $(HW)/at/src \ -y $(HW)/st/src \ -y $(HW)/tc/src \ -y $(HW)/tm/src \ -y $(HW)/tf/src \ -y $(HW)/cc/src \ -y $(HW)/bl/src \ -y $(HW)/io/src \ -y $(HW)/ri/src \ -y $(HW)/ar/src \ -y $(HW)/mi/src \ -y $(HW)/pi/src \ -y $(HW)/si/src \ -y $(HW)/ai/src \ -y $(HW)/vi/src \ -y $(HW)/ms/src \ -y $(HW)/tst/src \ -y $(HWLIB)/stdcell \ -y $(HWLIB)/ram \ -y $(HWLIB)/rac/behavioral \ -y $(HWLIB)/rdram/behavioral \ -y $(HWLIB)/pads \ -y $(HWLIB)/user \ -y $(HWLIB)/pif \ -v $(HWLIB)/udp/compass_udps.v \ +librescan \ +libext+.v+.vzd+.vmd \ +incdir+$(HW)/inc+$(HW)/../sim \ $(ROOT)/host_lib/libimage.a # $(ROOT)/PR/lib/libimage/libimage.so # # Default Targets: we build the pure 'C' simulators "rdp_c" and "rdp_c_mp", # we build the mixed 'C memspan' & verilog simulator "rdp_cv", # and we used to build the pure verilog simulator "rdp_v". # # rdp_c_mp is just a script generated by xnet which invokes the four # executables rdp_c_mp[0123]. # TARGETS = rdp_c rdp_cv rdp_v_0 rdp_v_16 SCRIPT_TARGETS = testit new_entry INST_TARGETS = $(TARGETS) $(SCRIPT_TARGETS) LDIRT0 = rdp_c_0.c rdp_v_0.c dump *.tab bits_gram.y bits_scan.l \ rdp_vms_0.c \ bits_scan.c *csrc *.dump *.daidir vcs.key vcs.log \ rdp_c_mp_0.c rdp_c_mp_1.c rdp_c_mp_2.c rdp_c_mp_3.c LDIRT1 = \ rdp_v_16.v rdp_vms_16.v InData/test*.mem InData/test*.rdp # # The gate level simulator "simv.ipc.gates" is currently built as # baraka:/a/hayes.gates/simv.ipc.gates. We will probably migrate the gate # level simulation build to an account coming soon to a server near you. # # At that time, we'll add the niceties like make clobber, etc... # clobber: $(COMMONPREF)clobber $(_FORCE) rm -rf $(LDIRT0) rm -rf $(LDIRT1) rm -rf OutData/*.rgb rm -rf OutData/*.cvg rm -rf OutData/*.out rm -rf OutData/*.cov rm -rf OutData/*.z rm -rf OutData/*.log rm -rf simv.ipc InData/*rdram $(MAKE) -C Wir $@ default exports: $(TARGETS) install : default $(INSTALL) -m 555 -F /usr/sbin $(INST_TARGETS) rdpinstall: rdp_c $(INSTALL) -m 555 -F /usr/sbin rdp_c #$(COMMONTARGS): %: $(COMMONPREF)% # $(SUBDIRS_MAKERULE) # # SGI Common Rules # include $(PRDEPTH)/PRrules # # Make testit script executable # testit: $(_FORCE) chmod 555 testit # # Make new_entry script executable # new_entry: $(_FORCE) chmod 555 new_entry # # Target for creating all .tab files # tab_files: $(_FORCE) cd InData; $(MAKE) tab_files # # Target for creating .1 files, Viewlogic Netlists # net_lists: cd Wir; $(MAKE) # # Target for creating links to files used in command shuffle # bits_gram.y: bits_scan.c links: [ -L bits_gram.y ] || ln -s ../../src/bits_gram.y . > /dev/null [ -L bits_scan.l ] || ln -s ../../src/bits_scan.l . > /dev/null # # Compile rdp 'C' simulator as a single process # rdp_c_0.c: net_lists rdp_c.config $(XNET) $(XNET) -d $(WIR) rdp_c -c rdp_c.config rdp_c: links $(TEST_OBJS) $(HOST_CC) $(TEST_OBJS) $(LDFLAGS) -o $@ # # Compile rdp 'C' simulator as four processes # rdp_c_mp_0.c rdp_c_mp_1.c rdp_c_mp_2.c rdp_c_mp_3.c: net_lists \ rdp_c_mp.config $(XNET) $(XNET) -s rdp_c_mp -d $(WIR) -o rdp_c_mp rdp_c -c rdp_c_mp.config -fd 3 rdp_c_mp_0: links $(PROC0_OBJS) rdp_c_mp_0.c $(HOST_CC) $(PROC0_OBJS) $(LDFLAGS) -o $@ rdp_c_mp_1: links $(PROC1_OBJS) rdp_c_mp_1.c $(HOST_CC) $(PROC1_OBJS) $(LDFLAGS) -o $@ rdp_c_mp_2: links $(PROC2_OBJS) rdp_c_mp_2.c $(HOST_CC) $(PROC2_OBJS) $(LDFLAGS) -o $@ rdp_c_mp_3: links $(PROC3_OBJS) rdp_c_mp_3.c $(HOST_CC) $(PROC3_OBJS) $(LDFLAGS) -o $@ rdp_c_mp: rdp_c_mp_0 rdp_c_mp_1 rdp_c_mp_2 rdp_c_mp_3 chmod 755 rdp_c_mp # # Build C process for Verilog/C memspan simulator # $(WIR)/rdp_v.1: $(WIR)/rdp_v.sch cd Wir; $(MAKE) # # -s rdp_cv causes xnet to generate the script 'rdp_cv'; the rule below does # the chmod to make it executable. # rdp_v_0.c: $(WIR)/rdp_v.1 rdp_cv.config $(XNET) $(XNET) -fd 0 -s rdp_cv -d $(WIR) rdp_v -c rdp_cv.config rdp_v_0: $(RDP_CV_C_OBJS) $(HOST_CC) $(RDP_CV_C_OBJS) $(LDFLAGS) -o $@ # # Build Verilog process for Verilog/C memspan simulator # rdp_v_16: rdp_v_0.c $(_FORCE) # VCS_RUNTIME=$(VCSDIR)/lib/libvcs.so \ $(VCS) $(VCSOPTS) -Mdir=$@.csrc -o rdp_v_16 rdp_v_16.v $(VCS) $(VCSOPTS) -Mdir=$@.csrc -o rdp_v_16 rdp_v_16.v rdp_cv: rdp_v_0 rdp_v_16 chmod 777 rdp_cv ################################################################################ # # Test Cases for Nightly Regression # # (Commented out cases have been temporarily/permanently retired) # # OutData/test039_att_cv_0.rgb.archive \ # OutData/test040_att_cv_0.rgb.archive \ # # OutData/test014_ew_cv_0.rgb.archive \ # OutData/test015_ew_cv_0.rgb.archive \ # # OutData/test012_ew_cv_0.rgb.archive \ # OutData/test022_ew_cv_0.rgb.archive \ # OutData/test023_ew_cv_0.rgb.archive \ # OutData/test040_ew_cv_0.rgb.archive \ # # OutData/test033_tex_cv_0.rgb.archive \ # OutData/test034_tex_cv_0.rgb.archive \ # OutData/test035_tex_cv_0.rgb.archive \ # OutData/test038_att_cv_0.rgb.archive \ # # OutData/test045_tex_cv_0.rgb.archive \ # ################################################################################ NIGHTLY_REGRESSION_TESTS = \ OutData/test014_att_cv_0.rgb.archive \ OutData/test015_att_cv_0.rgb.archive \ OutData/test016_att_cv_0.rgb.archive \ OutData/test017_att_cv_0.rgb.archive \ \ OutData/test031_att_cv_0.rgb.archive \ OutData/test032_att_cv_0.rgb.archive \ OutData/test132_att_cv_0.rgb.archive \ \ OutData/test022_cov_cv_0.rgb.archive \ OutData/test023_cov_cv_0.rgb.archive \ OutData/test024_cov_cv_0.rgb.archive \ OutData/test028_cov_cv_0.rgb.archive \ OutData/test029_cov_cv_0.rgb.archive \ OutData/test030_cov_cv_0.rgb.archive \ OutData/test040_cov_cv_0.rgb.archive \ \ OutData/test122_cov_cv_0.rgb.archive \ OutData/test123_cov_cv_0.rgb.archive \ OutData/test124_cov_cv_0.rgb.archive \ OutData/test128_cov_cv_0.rgb.archive \ OutData/test129_cov_cv_0.rgb.archive \ OutData/test130_cov_cv_0.rgb.archive \ \ OutData/test016_ew_cv_0.rgb.archive \ OutData/test026_ew_cv_0.rgb.archive \ OutData/test116_ew_cv_0.rgb.archive \ OutData/test126_ew_cv_0.rgb.archive \ OutData/test204_ew_cv_0.rgb.archive \ \ OutData/test030_tex_cv_0.rgb.archive \ OutData/test031_tex_cv_0.rgb.archive \ OutData/test032_tex_cv_0.rgb.archive \ OutData/test036_tex_cv_0.rgb.archive \ OutData/test037_tex_cv_0.rgb.archive \ OutData/test038_tex_cv_0.rgb.archive \ OutData/test039_tex_cv_0.rgb.archive \ OutData/test040_tex_cv_0.rgb.archive \ OutData/test042_tex_cv_0.rgb.archive \ OutData/test044_tex_cv_0.rgb.archive \ \ OutData/test131_tex_cv_0.rgb.archive \ OutData/test132_tex_cv_0.rgb.archive \ OutData/test140_tex_cv_0.rgb.archive \ \ OutData/test001_ms_cv_0.rgb.archive \ OutData/test002_ms_cv_0.rgb.archive \ OutData/test003_ms_cv_0.rgb.archive \ OutData/test004_ms_cv_0.rgb.archive \ OutData/test005_ms_cv_0.rgb.archive \ OutData/test006_ms_cv_0.rgb.archive \ OutData/test007_ms_cv_0.rgb.archive \ OutData/test010_ms_cv_0.rgb.archive \ OutData/test011_ms_cv_0.rgb.archive \ OutData/test013_ms_cv_0.rgb.archive \ OutData/test014_ms_cv_0.rgb.archive \ OutData/test015_ms_cv_0.rgb.archive \ OutData/test016_ms_cv_0.rgb.archive \ OutData/test017_ms_cv_0.rgb.archive \ \ OutData/test103_ms_cv_0.rgb.archive \ OutData/test105_ms_cv_0.rgb.archive \ OutData/test107_ms_cv_0.rgb.archive \ OutData/test114_ms_cv_0.rgb.archive \ OutData/test119_ms_cv_0.rgb.archive NIGHTLY_REGRESSION_TESTS_CV_CVG = $(subst rgb,cvg,${NIGHTLY_REGRESSION_TESTS}) NIGHTLY_REGRESSION_TESTS_C = $(subst _cv_,_c_,${NIGHTLY_REGRESSION_TESTS}) NIGHTLY_REGRESSION_TESTS_C_CVG = $(subst rgb,cvg,${NIGHTLY_REGRESSION_TESTS_C}) NIGHTLY_REGRESSION_TEST_ARCHIVE = $(NIGHTLY_REGRESSION_TESTS_CV_CVG) \ $(NIGHTLY_REGRESSION_TESTS_C) \ $(NIGHTLY_REGRESSION_TESTS_C_CVG) \ $(NIGHTLY_REGRESSION_TESTS) NIGHTLY_RDP_CV_ATT = $(subst _cv_,_cvf_,$(filter %_att_cv_0.rgb, $(basename ${NIGHTLY_REGRESSION_TESTS}))) NIGHTLY_RDP_CV_COV = $(subst _cv_,_cvf_,$(filter %_cov_cv_0.rgb, $(basename ${NIGHTLY_REGRESSION_TESTS}))) NIGHTLY_RDP_CV_EW = $(subst _cv_,_cvf_,$(filter %_ew_cv_0.rgb, $(basename ${NIGHTLY_REGRESSION_TESTS}))) NIGHTLY_RDP_CV_TEX = $(subst _cv_,_cvf_,$(filter %_tex_cv_0.rgb, $(basename ${NIGHTLY_REGRESSION_TESTS}))) NIGHTLY_RDP_CV_MS = $(subst _cv_,_cvf_,$(filter %_ms_cv_0.rgb, $(basename ${NIGHTLY_REGRESSION_TESTS}))) NIGHTLY_RDP_C_ATT = $(subst _cvf_,_cf_,${NIGHTLY_RDP_CV_ATT}) NIGHTLY_RDP_C_COV = $(subst _cvf_,_cf_,${NIGHTLY_RDP_CV_COV}) NIGHTLY_RDP_C_EW = $(subst _cvf_,_cf_,${NIGHTLY_RDP_CV_EW}) NIGHTLY_RDP_C_TEX = $(subst _cvf_,_cf_,${NIGHTLY_RDP_CV_TEX}) NIGHTLY_RDP_C_MS = $(subst _cvf_,_cf_,${NIGHTLY_RDP_CV_MS}) NIGHTLY_RDP_IO_ATT = $(subst _cvf_,_iof_,${NIGHTLY_RDP_CV_ATT}) NIGHTLY_RDP_IO_COV = $(subst _cvf_,_iof_,${NIGHTLY_RDP_CV_COV}) NIGHTLY_RDP_IO_EW = $(subst _cvf_,_iof_,${NIGHTLY_RDP_CV_EW}) NIGHTLY_RDP_IO_TEX = $(subst _cvf_,_iof_,${NIGHTLY_RDP_CV_TEX}) NIGHTLY_RDP_IO_MS = $(subst _cvf_,_iof_,${NIGHTLY_RDP_CV_MS}) NIGHTLY_RDP_GATE_ATT = $(subst _cvf_,_gatef_,${NIGHTLY_RDP_CV_ATT}) NIGHTLY_RDP_GATE_COV = $(subst _cvf_,_gatef_,${NIGHTLY_RDP_CV_COV}) NIGHTLY_RDP_GATE_EW = $(subst _cvf_,_gatef_,${NIGHTLY_RDP_CV_EW}) NIGHTLY_RDP_GATE_TEX = $(subst _cvf_,_gatef_,${NIGHTLY_RDP_CV_TEX}) NIGHTLY_RDP_GATE_MS = $(subst _cvf_,_gatef_,${NIGHTLY_RDP_CV_MS}) NIGHTLY_FILE_PREFIXES = $(subst _cv_0,,$(basename $(basename $(notdir $(NIGHTLY_REGRESSION_TESTS))))) ################################################################################ # # Nightly regression tests. We'll compare the image file outputs of the # Verilog and 'C' simulators on a variety of test cases generated in # PR/apps by the rsp simulator. # # There is no dependency on rdp_cv or rdp_v for the individual test targets; # nor is the nightly regression suite run automatically when you make default # or make install. Instead, you should make the simulator executables, then # (in a second pass) make the nightly regression target. # ################################################################################ nightly_regression: nightly_rdp_cv nightly_rdp_c nightly_rdp_io /bin/sh nightly_image_diff.sh $(NIGHTLY_FILE_PREFIXES) nightly_regression_cio: nightly_rdp_c nightly_rdp_io nightly_image_diff.sh: $(_FORCE) @chmod 555 nightly_image_diff.sh archive_image_diff.sh: $(_FORCE) @chmod 555 archive_image_diff.sh image_diff: nightly_image_diff.sh $(_FORCE) @nightly_image_diff.sh -s all $(NIGHTLY_FILE_PREFIXES) image_diff_hwio: nightly_image_diff.sh $(_FORCE) @nightly_image_diff.sh -b -s hwio $(NIGHTLY_FILE_PREFIXES) image_diff_cio: nightly_image_diff.sh $(_FORCE) @nightly_image_diff.sh -s cio $(NIGHTLY_FILE_PREFIXES) image_diff_ccv: nightly_image_diff.sh $(_FORCE) @nightly_image_diff.sh -s ccv $(NIGHTLY_FILE_PREFIXES) image_diff_cvio: nightly_image_diff.sh $(_FORCE) @nightly_image_diff.sh -s cvio $(NIGHTLY_FILE_PREFIXES) archive_diff: archive_image_diff.sh $(_FORCE) @archive_image_diff.sh -s all $(NIGHTLY_FILE_PREFIXES) > adiff.doc archive_diff_c: archive_image_diff.sh $(_FORCE) @archive_image_diff.sh -s c $(NIGHTLY_FILE_PREFIXES) > adiff_c.doc archive_diff_cv: archive_image_diff.sh $(_FORCE) @archive_image_diff.sh -s cv $(NIGHTLY_FILE_PREFIXES) > adiff_cv.doc archive_diff_io: archive_image_diff.sh $(_FORCE) @archive_image_diff.sh -s io $(NIGHTLY_FILE_PREFIXES) > adiff_io.doc archive_diff_gate: archive_image_diff.sh $(_FORCE) @archive_image_diff.sh -s gate $(NIGHTLY_FILE_PREFIXES) > adiff_gate.doc ################################################################################ # # Only checkin archive versions of the simulator output files on a periodic, # on-demand basis (e.g. whenever an RSP simulator/ucode or RDP simulator change # affects the output files mumble.rgb or mumble.cvg). # # Otherwise we'll pollute the source tree with unnecessary copies # of these data files. The intent is to give us a gold file to compare with. # ################################################################################ periodic_checkin: $(_FORCE) cd OutData; $(ROOT)/PR/tools/scripts/copySimResultsToArchive $(NIGHTLY_FILE_PREFIXES) nightly_rdp_cv: nightly_rdp_cv_cov nightly_rdp_cv_att nightly_rdp_cv_tex \ nightly_rdp_cv_ew nightly_rdp_cv_ms nightly_rdp_cv_att: $(NIGHTLY_RDP_CV_ATT) nightly_rdp_cv_cov: $(NIGHTLY_RDP_CV_COV) nightly_rdp_cv_ew: $(NIGHTLY_RDP_CV_EW) nightly_rdp_cv_tex: $(NIGHTLY_RDP_CV_TEX) nightly_rdp_cv_ms: $(NIGHTLY_RDP_CV_MS) nightly_rdp_c: nightly_rdp_c_att nightly_rdp_c_cov nightly_rdp_c_tex \ nightly_rdp_c_ew nightly_rdp_c_ms nightly_rdp_c_att: $(NIGHTLY_RDP_C_ATT) nightly_rdp_c_cov: $(NIGHTLY_RDP_C_COV) nightly_rdp_c_ew: $(NIGHTLY_RDP_C_EW) nightly_rdp_c_tex: $(NIGHTLY_RDP_C_TEX) nightly_rdp_c_ms: $(NIGHTLY_RDP_C_MS) nightly_rdp_io: nightly_rdp_io_cov nightly_rdp_io_ew nightly_rdp_io_ms \ nightly_rdp_io_tex nightly_rdp_io_att nightly_rdp_io_att: $(NIGHTLY_RDP_IO_ATT) nightly_rdp_io_cov: $(NIGHTLY_RDP_IO_COV) nightly_rdp_io_ew: $(NIGHTLY_RDP_IO_EW) nightly_rdp_io_tex: $(NIGHTLY_RDP_IO_TEX) nightly_rdp_io_ms: $(NIGHTLY_RDP_IO_MS) nightly_rdp_gate: nightly_rdp_gate_att nightly_rdp_gate_cov \ nightly_rdp_gate_tex nightly_rdp_gate_ew nightly_rdp_gate_ms nightly_rdp_gate_att: $(NIGHTLY_RDP_GATE_ATT) nightly_rdp_gate_cov: $(NIGHTLY_RDP_GATE_COV) nightly_rdp_gate_ew: $(NIGHTLY_RDP_GATE_EW) nightly_rdp_gate_tex: $(NIGHTLY_RDP_GATE_TEX) nightly_rdp_gate_ms: $(NIGHTLY_RDP_GATE_MS) ################################################################################ # # T e s t T a r g e t s # ################################################################################ # # test014_att: attribute update/sync in one-cycle mode # OutData/test014_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t att -s cv OutData/test014_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t att -s c OutData/test014_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t att -s io OutData/test014_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t att -s gate # # test015_att: attribute update/sync in two-cycle mode$(_FORCE) # OutData/test015_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t att -s cv OutData/test015_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t att -s c OutData/test015_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t att -s io OutData/test015_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t att -s gate # # test016_att: attribute update/sync in fill mode # OutData/test016_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t att -s cv OutData/test016_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t att -s c OutData/test016_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t att -s io OutData/test016_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t att -s gate # # test017_att: attribute update/sync in copy mode # OutData/test017_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t att -s cv OutData/test017_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t att -s c OutData/test017_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t att -s io OutData/test017_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t att -s gate # # test031_att: AA modes, texture loads, z-buffer, interpenetration, coverage, # etc. (LOOK_ALL) # OutData/test031_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t att -s cv OutData/test031_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t att -s c OutData/test031_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t att -s io OutData/test031_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t att -s gate # # test032_att: another view of 31, more edge-on cases # (LOOK_ALL_FOUR_TREES) # OutData/test032_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t att -s cv OutData/test032_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t att -s c OutData/test032_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t att -s io OutData/test032_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t att -s gate # # test132_att: 32 bit version of another view of 31, more edge-on cases # (LOOK_ALL_FOUR_TREES) # OutData/test132_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t att -s cv OutData/test132_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t att -s c OutData/test132_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t att -s io OutData/test132_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t att -s gate # # test038_att: zbuffer range/accuracy test # OutData/test038_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t att -s cv OutData/test038_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t att -s c OutData/test038_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t att -s io OutData/test038_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t att -s gate # # test039_att: odd interlaced version of test030 # OutData/test039_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t att -s cv OutData/test039_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t att -s c OutData/test039_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t att -s io OutData/test039_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t att -s gate # # test040_att: even interlaced version of test030 # OutData/test040_att_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t att -s cv OutData/test040_att_cf_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t att -s c OutData/test040_att_iof_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t att -s io OutData/test040_att_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t att -s gate # # test022_cov: Test all possible edge-types next to each other. # OutData/test022_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t cov -s cv OutData/test022_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t cov -s c OutData/test022_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t cov -s io OutData/test022_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t cov -s gate # # (32 bit version) # test122_cov: Test all possible edge-types next to each other. # OutData/test122_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 122 -t cov -s cv OutData/test122_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 122 -t cov -s c OutData/test122_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 122 -t cov -s io OutData/test122_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 122 -t cov -s gate # # test023_cov: # # 3 pairs of triangles, testing horizontal and nearly horizontal # shared edges. Should have full coverage... # OutData/test023_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t cov -s cv OutData/test023_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t cov -s c OutData/test023_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t cov -s io OutData/test023_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t cov -s gate # # test123_cov: # # (32 bit version) # 3 pairs of triangles, testing horizontal and nearly horizontal # shared edges. Should have full coverage... # OutData/test123_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 123 -t cov -s cv OutData/test123_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 123 -t cov -s c OutData/test123_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 123 -t cov -s io OutData/test123_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 123 -t cov -s gate # # test024_cov: # # Triangle mesh subpixel vertex. 6 triangles meeting. # OutData/test024_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 024 -t cov -s cv OutData/test024_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 024 -t cov -s c OutData/test024_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 024 -t cov -s io OutData/test024_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 024 -t cov -s gate # # test124_cov: # # (32 bit version) # Triangle mesh subpixel vertex. 6 triangles meeting. # OutData/test124_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 124 -t cov -s cv OutData/test124_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 124 -t cov -s c OutData/test124_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 124 -t cov -s io OutData/test124_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 124 -t cov -s gate # # test028_cov: # # placebo test case_tiny_00 # OutData/test028_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 028 -t cov -s cv OutData/test028_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 028 -t cov -s c OutData/test028_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 028 -t cov -s io OutData/test028_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 028 -t cov -s gate # # test128_cov: # # (32 bit version) # placebo test case_tiny_00 # OutData/test128_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 128 -t cov -s cv OutData/test128_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 128 -t cov -s c OutData/test128_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 128 -t cov -s io OutData/test128_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 128 -t cov -s gate # # test029_cov: # # placebo test case_tiny_00 # OutData/test029_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 029 -t cov -s cv OutData/test029_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 029 -t cov -s c OutData/test029_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 029 -t cov -s io OutData/test029_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 029 -t cov -s gate # # test129_cov: # # (32 bit version) # placebo test case_tiny_00 # OutData/test129_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 129 -t cov -s cv OutData/test129_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 129 -t cov -s c OutData/test129_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 129 -t cov -s io OutData/test129_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 129 -t cov -s gate # # test030_cov: # # placebo test case_disc_00 # OutData/test030_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t cov -s cv OutData/test030_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t cov -s c OutData/test030_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t cov -s io OutData/test030_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t cov -s gate # # test130_cov: # # (32 bit version) # placebo test case_disc_00 # OutData/test130_cov_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 130 -t cov -s cv OutData/test130_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 130 -t cov -s c OutData/test130_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 130 -t cov -s io OutData/test130_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 130 -t cov -s gate # # test040_cov: # # dither test case # OutData/test040_cov_cvf_0.rgb: $(_FORCE) #XXXblythe temporary add # $(TESTIT) -n 040 -t cov -s cv OutData/test040_cov_cf_0.rgb: $(_FORCE) #XXXblythe temporary add # $(TESTIT) -n 040 -t cov -s c OutData/test040_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t cov -s io OutData/test040_cov_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t cov -s gate # # test012_ew: (Extent test) # # Draws some triangles with all 3 vertices near the 2K # drawing boundary (opposite boundaries so the triangles # are visible on the screen) and some with one vertex # inthe screen and 2 vertices at opposite 2K boundaries # (so they are visible on screen). # OutData/test012_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 012 -t ew -s cv OutData/test012_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 012 -t ew -s c OutData/test012_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 012 -t ew -s io OutData/test012_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 012 -t ew -s gate # # test014_ew: # # 640x480 screensize (uses data from test 10) # Draws the triangles from test 10 but on a bigger screen. # to use this test with the RDP CSIM use the options: # -W 640 -H 480 # OutData/test014_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ew -s cv OutData/test014_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ew -s c OutData/test014_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ew -s io OutData/test014_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ew -s gate # # test015_ew: # # 1024x1024 screensize (uses data from test 10) # # Draws the triangles from test 10 but on a bigger screen. # to use this test with the RDP CSIM use the options:$(_FORCE) # -W 1024 -H 1024 # OutData/test015_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ew -s cv OutData/test015_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ew -s c OutData/test015_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ew -s io OutData/test015_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ew -s gate # # test016_ew: # # Draw 8 identical triangles with the scissor box scissoring each # at a different subpixel location. # OutData/test016_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ew -s cv OutData/test016_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ew -s c OutData/test016_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ew -s io OutData/test016_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ew -s gate # # test116_ew: # # (32 bit version) # Draw 8 identical triangles with the scissor box scissoring each # at a different subpixel location. # OutData/test116_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 116 -t ew -s cv OutData/test116_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 116 -t ew -s c OutData/test116_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 116 -t ew -s io OutData/test116_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 116 -t ew -s gate # # test022_ew: # # Even interlace test, hand generated. # OutData/test022_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t ew -s cv OutData/test022_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t ew -s c OutData/test022_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t ew -s io OutData/test022_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 022 -t ew -s gate # # test023_ew: # # Odd interlace test, hand generated. # OutData/test023_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t ew -s cv OutData/test023_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t ew -s c OutData/test023_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t ew -s io OutData/test023_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 023 -t ew -s gate # # test026_ew: # # Particle system test # OutData/test026_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 026 -t ew -s cv OutData/test026_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 026 -t ew -s c OutData/test026_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 026 -t ew -s io OutData/test026_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 026 -t ew -s gate # # test126_ew: # # 32 bit version of Particle system test # OutData/test126_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 126 -t ew -s cv OutData/test126_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 126 -t ew -s c OutData/test126_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 126 -t ew -s io OutData/test126_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 126 -t ew -s gate # # test040_ew # # Toggle coverage case # OutData/test040_ew_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t ew -s cv OutData/test040_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t ew -s c OutData/test040_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t ew -s io OutData/test040_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t ew -s gate # # bowtie test case # OutData/test204.rgb: $(_FORCE) $(TESTIT) -n 204 -t ew -s io OutData/test204_ew_cvf_0.rgb: $(_FORCE) #XXXblythe temporary add # $(TESTIT) -n 204 -t ew -s cv OutData/test204_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 204 -t ew -s c OutData/test204_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 204 -t ew -s io OutData/test204_ew_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 204 -t ew -s gate # # test030_tex # # Collection of texture tests to run for nightly toplevel texture regression # DP in 1 clock mode # OutData/test030_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t tex -s cv OutData/test030_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t tex -s c OutData/test030_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t tex -s io OutData/test030_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 030 -t tex -s gate # # test031_tex # # Collection of texture tests to run for nightly toplevel texture regression # DP in 2 clock mode # OutData/test031_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t tex -s cv OutData/test031_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t tex -s c OutData/test031_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t tex -s io OutData/test031_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 031 -t tex -s gate # # test131_tex # # (32 bit version) # Collection of texture tests to run for nightly toplevel texture regression # DP in 2 clock mode # OutData/test131_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 131 -t tex -s cv OutData/test131_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 131 -t tex -s c OutData/test131_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 131 -t tex -s io OutData/test131_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 131 -t tex -s gate # # test032_tex # # 1 clock texture regression test with interlace mode on, odd field # OutData/test032_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t tex -s cv OutData/test032_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t tex -s c OutData/test032_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t tex -s io OutData/test032_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 032 -t tex -s gate # # test132_tex # # (32 bit version) # 1 clock texture regression test with interlace mode on, odd field # OutData/test132_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t tex -s cv OutData/test132_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t tex -s c OutData/test132_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t tex -s io OutData/test132_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 132 -t tex -s gate # # test033_tex # # 1 clock texture regression test with interlace mode on, even field # OutData/test033_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 033 -t tex -s cv OutData/test033_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 033 -t tex -s c OutData/test033_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 033 -t tex -s io OutData/test033_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 033 -t tex -s gate # # test034_tex # # 2 clock texture regression test with interlace mode on, odd field # OutData/test034_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 034 -t tex -s cv OutData/test034_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 034 -t tex -s c OutData/test034_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 034 -t tex -s io OutData/test034_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 034 -t tex -s gate # # test035_tex # # 2 clock texture regression test with interlace mode on, even field # OutData/test035_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 035 -t tex -s cv OutData/test035_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 035 -t tex -s c OutData/test035_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 035 -t tex -s io OutData/test035_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 035 -t tex -s gate # # test036_tex # # 16-bit copies # OutData/test036_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 036 -t tex -s cv OutData/test036_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 036 -t tex -s c OutData/test036_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 036 -t tex -s io OutData/test036_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 036 -t tex -s gate # # test037_tex # # 16-bit texture rectangle in 1 cycle mode # 123pixels x 125pixels # OutData/test037_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 037 -t tex -s cv OutData/test037_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 037 -t tex -s c OutData/test037_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 037 -t tex -s io OutData/test037_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 037 -t tex -s gate # # test038_tex # # 1 cycle LOD test # OutData/test038_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t tex -s cv OutData/test038_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t tex -s c OutData/test038_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t tex -s io OutData/test038_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 038 -t tex -s gate # # test039_tex # # 2 cycle trilerp texture + detail test # OutData/test039_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t tex -s cv OutData/test039_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t tex -s c OutData/test039_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t tex -s io OutData/test039_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t tex -s gate # # test040_tex # # TLUT load case # OutData/test040_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t tex -s cv OutData/test040_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t tex -s c OutData/test040_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t tex -s io OutData/test040_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 040 -t tex -s gate # # test140_tex # # (32 bit version) # TLUT load case # OutData/test140_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 140 -t tex -s cv OutData/test140_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 140 -t tex -s c OutData/test140_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 140 -t tex -s io OutData/test140_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 140 -t tex -s gate # # test042_tex # # Texture sharpen test # OutData/test042_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 042 -t tex -s cv OutData/test042_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 042 -t tex -s c OutData/test042_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 042 -t tex -s io OutData/test042_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 042 -t tex -s gate # # test044_tex # # 2 cycle trilerp texture + detail test # (different mask and shift from Test 39) # OutData/test044_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 044 -t tex -s cv OutData/test044_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 044 -t tex -s c OutData/test044_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 044 -t tex -s io OutData/test044_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 044 -t tex -s gate # # test045_tex # # 2 clock test with exact differences between clock 1 and 2 in CC/BL/MS # has random noise, therefore, visual checks only # OutData/test045_tex_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 045 -t tex -s cv OutData/test045_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 045 -t tex -s c OutData/test045_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 045 -t tex -s io OutData/test045_tex_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 045 -t tex -s gate # # test001_ms # # # OutData/test001_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 001 -t ms -s cv OutData/test001_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 001 -t ms -s c OutData/test001_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 001 -t ms -s io OutData/test001_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 001 -t ms -s gate # # test002_ms # # # Simple Right major triangle # OutData/test002_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 002 -t ms -s cv OutData/test002_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 002 -t ms -s c OutData/test002_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 002 -t ms -s io OutData/test002_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 002 -t ms -s gate # # test003_ms # # Z buffered triangles # OutData/test003_ms_cvf_0.rgb: $(TESTIT) -n 003 -t ms -s cv OutData/test003_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 003 -t ms -s c OutData/test003_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 003 -t ms -s io OutData/test003_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 003 -t ms -s gate # # test103_ms # # 32 bit version of texture alignment test # OutData/test103_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 103 -t ms -s cv OutData/test103_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 103 -t ms -s c OutData/test103_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 103 -t ms -s io OutData/test103_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 103 -t ms -s gate # # test004_ms # # Simple 2 cycle test # OutData/test004_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 004 -t ms -s cv OutData/test004_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 004 -t ms -s c OutData/test004_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 004 -t ms -s io OutData/test004_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 004 -t ms -s gate # # test005_ms # # Z buffered xlu triangles after opaque tri # OutData/test005_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 005 -t ms -s cv OutData/test005_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 005 -t ms -s c OutData/test005_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 005 -t ms -s io OutData/test005_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 005 -t ms -s gate # # test105_ms # # 32 bit version of texture Z buffered xlu triangles after opaque tri # OutData/test105_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 105 -t ms -s cv OutData/test105_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 105 -t ms -s c OutData/test105_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 105 -t ms -s io OutData/test105_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 105 -t ms -s gate # # test006_ms # # Zbuffered triangles from test 3 but AA not pt sampled # OutData/test006_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 006 -t ms -s cv OutData/test006_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 006 -t ms -s c OutData/test006_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 006 -t ms -s io OutData/test006_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 006 -t ms -s gate # # test007_ms # # blend # OutData/test007_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 007 -t ms -s cv OutData/test007_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 007 -t ms -s c OutData/test007_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 007 -t ms -s io OutData/test007_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 007 -t ms -s gate # # test107_ms # # 32 bit version of blend # OutData/test107_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 107 -t ms -s cv OutData/test107_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 107 -t ms -s c OutData/test107_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 107 -t ms -s io OutData/test107_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 107 -t ms -s gate # # test010_ms # # 4 fillrects with different colors and different horz lengths # OutData/test010_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 010 -t ms -s cv OutData/test010_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 010 -t ms -s c OutData/test010_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 010 -t ms -s io OutData/test010_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 010 -t ms -s gate # # test011_ms # # a 16 bit texture load followed by a textured rectangle in # copy mode. # OutData/test011_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 011 -t ms -s cv OutData/test011_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 011 -t ms -s c OutData/test011_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 011 -t ms -s io OutData/test011_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 011 -t ms -s gate # # test013_ms # # more comprehensive fill, 1cycle and 2cycle tests # OutData/test013_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 013 -t ms -s cv OutData/test013_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 013 -t ms -s c OutData/test013_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 013 -t ms -s io OutData/test013_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 013 -t ms -s gate # # test014_ms # # a 16 bit texture load followed by 2 1-cycle triangles # (to make a square) # OutData/test014_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ms -s cv OutData/test014_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ms -s c OutData/test014_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ms -s io OutData/test014_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ms -s gate # # test114_ms # # 32 bit version of: # a 16 bit texture load followed by 2 1-cycle triangles # (to make a square) # OutData/test114_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 114 -t ms -s cv OutData/test114_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 114 -t ms -s c OutData/test114_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 114 -t ms -s io OutData/test114_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 114 -t ms -s gate # # test015_ms # # all the render modes and pipe sync's tested here # for one cycle mode # OutData/test015_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ms -s cv OutData/test015_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ms -s c OutData/test015_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ms -s io OutData/test015_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ms -s gate # # test016_ms # # same as test 15 but 2 cycle mode # OutData/test016_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ms -s cv OutData/test016_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ms -s c OutData/test016_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ms -s io OutData/test016_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 016 -t ms -s gate # # test017_ms # # texture alignment test # OutData/test017_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t ms -s cv OutData/test017_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t ms -s c OutData/test017_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t ms -s io OutData/test017_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 017 -t ms -s gate # # test119_ms # # 32 bit version of texture alignment test with copy mode stuff deleted. # OutData/test119_ms_cvf_0.rgb: $(_FORCE) $(TESTIT) -n 119 -t ms -s cv OutData/test119_ms_cf_0.rgb: $(_FORCE) $(TESTIT) -n 119 -t ms -s c OutData/test119_ms_iof_0.rgb: $(_FORCE) $(TESTIT) -n 119 -t ms -s io OutData/test119_ms_gatef_0.rgb: $(_FORCE) $(TESTIT) -n 119 -t ms -s gate # # test050_tex: 16b fb clear # OutData/test050_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 050 -t tex -s c OutData/test050_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 050 -t tex -s io # # test152_tex: 32b fb clear # OutData/test152_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 152 -t tex -s c OutData/test152_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 152 -t tex -s io # # test053_tex: 16b odd interlaced fb clear # OutData/test053_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 053 -t tex -s c OutData/test053_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 053 -t tex -s io # # test158_tex: 32b even interlaced fb clear # OutData/test158_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 158 -t tex -s c OutData/test158_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 158 -t tex -s io # # test060_tex: yuv conversion # OutData/test060_tex_cf_0.rgb: $(_FORCE) $(TESTIT) -n 060 -t tex -s c OutData/test060_tex_iof_0.rgb: $(_FORCE) $(TESTIT) -n 060 -t tex -s io # # test039_cov: low sloped lines # OutData/test039_cov_cf_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t cov -s c OutData/test039_cov_iof_0.rgb: $(_FORCE) $(TESTIT) -n 039 -t cov -s io # # test006_ew: small tris + null tris # OutData/test006_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 006 -t ew -s c OutData/test006_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 006 -t ew -s io # # test010_ew: ew extent case # OutData/test010_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 010 -t ew -s c OutData/test010_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 010 -t ew -s io # # test011_ew: ew extent case # OutData/test011_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 011 -t ew -s c OutData/test011_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 011 -t ew -s io # # test012_ew: ew extent case # OutData/test012_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 012 -t ew -s c OutData/test012_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 012 -t ew -s io # # test013_ew: ew extent case # OutData/test013_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 013 -t ew -s c OutData/test013_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 013 -t ew -s io # # test014_ew: hires test # OutData/test014_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ew -s c OutData/test014_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 014 -t ew -s io # # test015_ew: 1k x 1k image # OutData/test015_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ew -s c OutData/test015_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 015 -t ew -s io # # test019_ew: 32b diff cycle types # OutData/test019_ew_cf_0.rgb: $(_FORCE) $(TESTIT) -n 019 -t ew -s c OutData/test019_ew_iof_0.rgb: $(_FORCE) $(TESTIT) -n 019 -t ew -s io #################################################################################### # # QSIM targets. Use existing tests and verilog simulator to create .tab files # for Qsim testing. Use +qsim_dump flag for enabling and setting file name # used for Qsim tab file. Use -Q flag for forcing same rather than random seed # for stalls. # #################################################################################### QSIM_TAB_FILES = \ OutData/test000.tab.Z \ OutData/test001.tab.Z \ OutData/test002.tab.Z \ OutData/test003.tab.Z \ OutData/test004.tab.Z \ OutData/test005.tab.Z \ OutData/test006.tab.Z \ OutData/test007.tab.Z qsim_tab_files: $(QSIM_TAB_FILES) # # test000.tab # # Attribute Sync case, 1 cycle mode # OutData/test000.tab.Z: $(ATTDEPTH)/test014.14.rdp.Z $(ATTDEPTH)/test014.14.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 14" testit -n 014 -t att -s cv rm -f $@ compress $(basename $@) # # test001.tab # # Attribute Sync case, 2 cycle mode # OutData/test001.tab.Z: $(ATTDEPTH)/test015.15.rdp.Z $(ATTDEPTH)/test015.15.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 15" testit -n 015 -t att -s cv rm -f $@ compress $(basename $@) # # test002.tab # # Attribute Sync case, Fill mode # OutData/test002.tab.Z: $(ATTDEPTH)/test016.16.rdp.Z $(ATTDEPTH)/test016.16.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 16" testit -n 016 -t att -s cv rm -f $@ compress $(basename $@) # # test003.tab # # Attribute Sync case, Copy mode # OutData/test003.tab.Z: $(ATTDEPTH)/test017.17.rdp.Z $(ATTDEPTH)/test017.17.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 17" testit -n 017 -t att -s cv rm -f $@ compress $(basename $@) # # test004.tab # # Interlace Case, odd field, 2 cycle mode # OutData/test004.tab.Z: $(TEXDEPTH)/test035.35.rdp.Z $(TEXDEPTH)/test035.35.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 17" testit -n 035 -t tex -s cv rm -f $@ compress $(basename $@) # # test005.tab # # Interlace Case, even field, 2 cycle mode # OutData/test005.tab.Z: $(TEXDEPTH)/test035.35.rdp.Z $(TEXDEPTH)/test035.35.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 35" testit -n 035 -t tex -s cv rm -f $@ compress $(basename $@) # # test006.tab # # Toggle Case, try to toggle as many internal nodes as possible # OutData/test006.tab.Z: $(EWDEPTH)/test040.40.rdp.Z $(EWDEPTH)/test040.40.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 40" testit -n 040 -t ew -s cv rm -f $@ compress $(basename $@) # # test007.tab # # Large Database: AA modes, texture loads, z-buffer, interpenetration, coverage, # etc. # OutData/test007.tab.Z: $(ATTDEPTH)/test031.31.rdp.Z $(ATTDEPTH)/test031.31.mem.Z RDP_OPTS="+qsim_dump=$(basename $@) -Q 31" testit -n 031 -t att -s cv rm -f $@ compress $(basename $@)