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<center>
<h1>
Bring-up SW</h1></center>

<center><b><font size=+2>Plan Summary</font></b></center>

<h2>
Reference</h2>

<ol>
<li>
<a href="http://intwww/bb/rf/doc/hw/devsys.html">Bring Up/Development System</a></li>
</ol>
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<h2>
Contents</h2>

<ul>
<li>
<a href="#Background">Background</a></li>

<li>
<a href="#Linux_JTAG_Library_Tools">Linux JTAG Library and Tools</a></li>

<li>
<a href="#diag_script">Diagnostic shell script</a></li>

<li>
<a href="#Linux_debug_printf_server">Linux debug printf server</a></li>

<li>
<a href="#Linux_debug_port_flash_programmer">Linux debug port flash programmer</a></li>

<li>
<a href="#Linux_debug_board_pp_lib">Linux lib to support debug board parallel
port</a></li>

<li>
<a href="#JTAG_diags_for_first_boards">JTAG based diags for first boards
before delivery to Palo Alto</a></li>
</ul>

<h2>
<a NAME="Background" </a></a>Background</h2>
As quickly as possible, get ability to::
<ol>
<li>
Load sk and app on a flash module and use normal boot sequence to load
and run the app/test.</li>

<li>
printf debugging via debug port.</li>

<li>
gdb available for debugging.</li>
</ol>
To account for the possibility that some hw/sw will not work initially,
we need to have a fallback plan for other methods of performing tests.
<p>Some alternate test methods:
<ol>
<li>
Tests performed using JTAG write/read with cpu held in reset. Similar to
iosim tests.</li>

<li>
Load a test program into boot sram via JTAG and boot it. Results checked
via JTAG reads, CRT, audio. Data and/or code can be loaded into other mem
via JTAG as desired.</li>

<li>
Use PC host to put sk and app onto flash module. Use JTAG to load boot
code that boots and loads the sk to run the app. Use osSyncPrintf for debug.</li>
</ol>
If we do not initially have the ability to program flash from a PC host,
we can program flash via JTAG read/write to BB address space (like iosim
tests). For faster flash programming via the debug port:
<ol>
<li>
Use JTAG to load and boot a small program that provides a debug port monitor
with the ability to read/write to BB address space.</li>

<li>
Switch out of JTAG mode</li>

<li>
Use debug port read/writes to BB address space to program flash.</li>
</ol>

<h2>
<a NAME="Linux_JTAG_Library_Tools" </a></a>Linux JTAG Library and Tools</h2>

<dl>Linux JTAG Library
<dd>
Ported from JTAG IOSIM tests</dd>

<br>Provides low level jtag functions and write_bcp(), read_bcp()
<br>Callbacks for read,write,wait so can be used with debug board, iosim,
or cpusim.
<p>Linux JTAG Tools
<dd>
Comand line app "jtag" provides BB space read/write and program load/boot.</dd>

<br>Uses debug board parallel port. Must be root user or set rw permission
to parport device(under /dev).
<dl>Usage:
<dd>
<b>jtag</b> [options] <b>jtag_cmd</b> [options] <b>args</b></dd>

<dl>Examples:
<dd>
jtag&nbsp;&nbsp; wd_write&nbsp;&nbsp;&nbsp; 0x0000a830&nbsp;&nbsp; 0xdeadbeef</dd>

<dd>
jtag&nbsp;&nbsp; blk_load&nbsp;&nbsp;&nbsp;&nbsp; -o 0x400&nbsp;&nbsp;
myfile.dat</dd>

<dd>
jtag&nbsp;&nbsp; sram_boot&nbsp;&nbsp;&nbsp; myprog.dat</dd>

<p><br>jtag options:
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -i&nbsp; use
ipc( sim.cpu.ipc or sim.ipc ) simulator instead
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -n does not
pursuit jtag sanity check
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -S sleep given
clocks, then run the command
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -r&nbsp; does not call reset-tap
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -D Turn off debug path when done
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;-R&nbsp; Reset tap when done
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -v&nbsp; verbose
output
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -h&nbsp; usage
<p>jtag_cmds and args:
<dl>
<dt>
<b>wd_write</b> addr word</dt>

<dd>
write 32 bit word to BB addr</dd>

<dt>
<b>wd_read</b> addr</dt>

<dd>
read 32 bit word from BB addr</dd>

<br>Result written to stdout.
<dt>
<b>sram_boot</b> [file]</dt>

<dd>
Load code from file into SRAM and boot.</dd>

<br>Default file is stdin.
<dt>
<b>blk_load</b> [-a addr_space | -b addr_base] [-o offset] [file]</dt>

<dd>
Load words from an ascii hex file to bb starting at</dd>

<br>addr_space + offset or addr_base + offest. Default file is stdin.
<br>Default addr_space is bb (i.e. addr_base=0). Default offset is 0.
<br>Addr_space can be bb, dmem, or imem.
<dl>
<dt>
Examples:</dt>

<dd>
jtag blk_load -o 0x400 myfile.dat</dd>

<dd>
jtag blk_load -a imem myfile.dat</dd>

<dd>
jtag blk_load -b 0x04610000 -o 512 myfile.dat</dd>
</dl>

<dt>
<b>blk_dump</b> [-a addr_space | -b addr_base] [-o offset] num_words [file]</dt>

<dd>
Dump num_wds to ascii hex file starting from addr_space + offset or</dd>

<br>addr_base + offest. Default file is stdout.
<br>Default addr_space is bb (i.e. addr_base=0). Default offset is 0.
<br>Addr_space can be bb, dmem, or imem.
<dl>
<dt>
Examples:</dt>

<dd>
jtag blk_dump -o 0x400 1024 myfile.dat</dd>

<dd>
jtag blk_dump -a imem 0x20 myfile.dat</dd>

<dd>
jtag blk_dump -b 0x04610000 -o 512 16 myfile.dat</dd>
</dl>

<dt>
<b>cpu_reset</b></dt>

<dd>
Reset cpu by using reset_en, reset_dis.</dd>

<dt>
<b>cpu_stop</b></dt>

<dd>
Stop the cpu using reset_en</dd>

<dt>
<b>cpu_start</b></dt>

<dd>
Start the cpu using reset_dis</dd>

<dt>
<b>sram_boot_en</b></dt>

<dd>
Enable booting from sram when cpu_start issued</dd>

<dt>
<b>rom_boot_en</b></dt>

<dd>
Enable booting from rom when cpu_start issued</dd>
</dl>

<dd>
<b>dbg_off</b></dd>

<dl>
<dd>
Turn off jtag debug path</dd>
</dl>

<dd>
<b>virage_store -s 0|1|2&nbsp; binary_data_file</b></dd>

<dl>
<dd>
Store given binary file(big-endian) into virage flash(NOVeA).</dd>

<dd>
(There is a tool under PR/diag/jtag/hex2dat&nbsp; to convert hex data into
binary)</dd>
</dl>

<dd>
<b>virage_recall -s 0|1|2&nbsp; binary_data_file</b></dd>

<dl>
<dd>
Recall the data from virage flash and write to given binary file.</dd>
</dl>

<dd>
<b>init_ddr&nbsp;&nbsp;&nbsp; [-m memclk(MHz)] [-d 32/16] [-p]</b></dd>

<dl>
<dd>
Initialize DDR by given parameters.</dd>

<dd>
-m specified mem clock (in Mhz, default is 192)</dd>

<dd>
-d specified which ddr parts are used. (default is 32)</dd>

<dd>
-p pll bypass</dd>
</dl>
</dl>
</dl>
</dl>

<h2>
<a NAME="diag_script"></a>Diagnostic shell scripts</h2>

<blockquote>Those scripts called jtag tools to achieve more complex jobs
or tests, and they are put in PR/diag/jtag.&nbsp; All of them have the
option -i, which means run it via RTL simulator.
<p><b>ddr_param</b>
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Initialize DDR by given parameters.&nbsp;
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Options:
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-c&nbsp; tcl in mode register
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-n&nbsp; refresh count
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-s&nbsp; strobe reversal
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-a auto precharge
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-x 16bits ddr parts
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-l&nbsp;&nbsp; trdel
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-w twdel
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-r&nbsp; tras
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-p&nbsp; trp
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-d&nbsp; trcd
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-f&nbsp;&nbsp; trfc
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-t&nbsp;&nbsp;&nbsp; tcl in parameter register
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-h&nbsp;&nbsp; help
<p>ddr
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Simple DDR test, (toggle
all address/data lines)
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Options:
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-i use RTL simulator
<p>ddr_init
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Initialize ddr by using&nbsp;
jtag&nbsp; init_ddr command.
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Options:
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-i RTL simulator
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-m memory-clock
<p>flash
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Simple flash erase/write/read
test
<p>jtat_test
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Jtag sanity check test
<p>lctrl
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; local controller test
<p>vi
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Simple vi test
<p>ai
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Simple ai test
<p>ide
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Simple ide test
<p>bsram
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Boot sram tests(David's
cpu tests).
<p>usb
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Pull up/down usb resistor
lines.
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Options:
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-c 0/1 which controller
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-p pull up d+ line
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-m pull up d- line
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-d pull down d+ line
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-l pull down d- line
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-v turn on vbus (default is off)
<br>&nbsp;
<br>jboot
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Run single-segment rom(loaded
in ddr) via boot sram.
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Options:
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-b sram boot code. (default: PR/tools/jtag/bootrom/bootrom.dat)
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-r rom file.
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-s&nbsp; signature which will be replaced with target adddress.
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
-j&nbsp;&nbsp; jumping to where. default is "entry 2" in rom file.</blockquote>

<h2>
<a NAME="Linux_debug_printf_server" </a></a>Linux debug printf server</h2>

<ul>
<li>
User space app.</li>

<li>
Uses n64 debug board 32bit message packet format and message types.</li>

<dl>
<dd>
6 bit msg type, 2 bit size, 3 bytes data</dd>
</dl>

<li>
Receives packets xmitted by rmon via BB debug board parallel port.</li>

<li>
Parses message packets for processing based on message type.</li>

<li>
Processes printf messages originated by osSyncPrintf()</li>

<li>
printf output sent to stdout.</li>

<li>
Can be expanded to process other rmon messages</li>

<dl>
<dd>
osLogEvent.</dd>

<br>__rmonSendFault on OS_EVENT_FAULT.</dl>

<li>
Can be expanded or code can be reused to provide processing of debug packets
for gdb interface</li>
</ul>

<h2>
<a NAME="Linux_debug_port_flash_programmer" </a></a>Linux debug port flash
programmer</h2>

<ul>
<li>
Small program loaded into boot ram via JTAG to provide BB debug port monitor
with BB addr space read/write ability.</li>

<li>
Manually switch from JTAG mode to normal debug port mode.</li>

<li>
Linux app communicates with BB monitor to do BB addr space read/writes
to program flash similar to IOSIM tests.</li>

<li>
Option to have Linux app read/write via JTAG instead of BB monitor.</li>
</ul>

<h2>
<a NAME="Linux_debug_board_pp_lib" </a></a>Linux lib to support debug board
parallel port</h2>

<ul>
<li>
Used by JTAG tools, debug printf server, and flash programmer.</li>

<li>
Encapsulates initialization, closing, setting protocol, and read/write
routines</li>

<li>
Uses Linux ppdev device driver which allows access to IEEE 1284 parallel
port functionality from user level app using ioctl commands in addition
to open, close, read, and write.</li>
</ul>

<h2>
<a NAME="JTAG_diags_for_first_boards" </a></a>JTAG based diags for first
boards before delivery to Palo Alto</h2>
Goal is to find out if interfaces are working so boards can be sent to
BroadOn Palo Alto for testing; or if fixes need to be made before that
can happen.
<p>The plan is to have simple tests that are performed in a simple manner
with minimal dependencies.&nbsp; More thorough tests will be done once
the boards are in Palo Alto.
<p>Therefore, do initial tests with write/read via jtag with cpu held in
reset.
<p>Prioritized list of tests.
<ol>
<li>
Test jtag</li>

<ol>
<li>
jtag state test</li>

<li>
jtag id test</li>

<li>
jtag bybass test</li>
</ol>

<li>
Test DDR SDRAM</li>

<br>&nbsp;
<li>
Display pattern on CRT</li>

<br>&nbsp;
<li>
Play some audio</li>

<br>&nbsp;
<li>
Test access to flash module</li>

<br>Want to make this simple. but not sure how much we need to do.&nbsp;&nbsp;
Simplest test would be to read device ids. If we can have a flash module
with known content, we could just read a page and verify content is as
expected. A more complete test would be to erase/write/read/verify.</ol>
Include at least one optional test that uses jtag to load and boot a program
that does at least a memory test.
<p>Controller and other tests are not required at this phase.
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<END>
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