cspartdec.v
3.69 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphic, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
// $Id: cspartdec.v,v 1.1 2002/05/21 23:55:43 berndt Exp $
/////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: cspartdec
// description: partial decode directly from fifo
//
//
// designer: Mike M. Cai 10/5/94
//
/////////////////////////////////////////////////////////////////////////
module cspartdec( // outputs
sync_tile, sync_pipe, sync_full, sync_load,
one_word_cmd,
size_prim,
// inputs
fifo_out_cmd, state_zero
);
output sync_tile, sync_pipe, sync_full, sync_load;
output one_word_cmd;
output [4:0] size_prim;
input [5:0] fifo_out_cmd;
input state_zero;
reg [4:0] size_prim;
reg sync_tile, sync_pipe, sync_full, sync_load;
reg one_word_cmd;
`include "rdpcmd.vh"
always @(fifo_out_cmd or state_zero)
begin
sync_tile = 1'h0;
sync_pipe = 1'h0;
sync_full = 1'h0;
sync_load = 1'h0;
one_word_cmd = 1'h0;
if ( state_zero )
case (fifo_out_cmd)
fullsync:
begin
sync_full = 1'h1;
one_word_cmd = 1'h1;
end
tilesync:
begin
sync_tile = 1'h1;
one_word_cmd = 1'h1;
end
pipesync:
begin
sync_pipe = 1'h1;
one_word_cmd = 1'h1;
end
loadsync:
begin
sync_load = 1'h1;
one_word_cmd = 1'h1;
end
setblendcolor, setfogcolor, setfillcolor, setscissor, setconvert,
setkeyr, setkeygb, setrdpother, setprimdepth, noop:
begin
one_word_cmd = 1'h1;
end
settile, settilesize:
begin
one_word_cmd = 1'h1;
end
loadtile, loadblock, loadtlut,
texrect, texrectflip, fillrect,
trifill, trishade, tritxtr, trishadetxtr, trifillzbuff,
trishadezbuff, tritxtrzbuff, trishadetxtrzbuff:
begin
one_word_cmd = 1'h0;
end
default:
begin
one_word_cmd = 1'h1;
end
endcase
end
always @(fifo_out_cmd)
case (fifo_out_cmd)
texrect:
begin
size_prim = 5'h2;
end
texrectflip:
begin
size_prim = 5'h2;
end
trifill:
begin
size_prim = 5'h4;
end
trishade:
begin
size_prim = 5'hc;
end
tritxtr:
begin
size_prim = 5'hc;
end
trishadetxtr:
begin
size_prim = 5'h14;
end
trifillzbuff:
begin
size_prim = 5'h6;
end
trishadezbuff:
begin
size_prim = 5'he;
end
tritxtrzbuff:
begin
size_prim = 5'he;
end
trishadetxtrzbuff:
begin
size_prim = 5'h16;
end
fillrect:
begin
size_prim = 5'h1;
end
loadtile, loadblock, loadtlut:
begin
size_prim = 5'h1;
end
default:
begin
size_prim = 1'h1;
end
endcase
endmodule // c spartdec