TBSECCDX4.v
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// VERSION:4.00 DATE:2001/05/14 OPENCAD Verilog LIBRARY
`timescale 1ps / 1ps
`celldefine
`ifdef verifault
`suppress_faults
`enable_portfaults
`endif
module TBSECCDX4 ( N01, N02, H01, H02, H03 );
input H01;
input H02;
input H03;
output N01;
output N02;
buf ( _H01, H01 );
buf ( _H02, H02 );
buf ( _H03, H03 );
not ( _H02N, _H02 );
udp_MUX ( N01, _H03, _H01, _H02N );
udp_MUX ( N02, _H03, _H01, _H02 );
specify
specparam DMY_SPC=1:1:1;
( H01 => N01 ) = ( DMY_SPC, DMY_SPC );
( H01 => N02 ) = ( DMY_SPC, DMY_SPC );
( H02 => N01 ) = ( DMY_SPC, DMY_SPC );
( H02 => N02 ) = ( DMY_SPC, DMY_SPC );
if ( H03 )
( H03 => N01 ) = ( DMY_SPC, DMY_SPC );
if ( H03 )
( H03 => N02 ) = ( DMY_SPC, DMY_SPC );
if ( !H03 )
( H03 => N01 ) = ( DMY_SPC, DMY_SPC );
if ( !H03 )
( H03 => N02 ) = ( DMY_SPC, DMY_SPC );
endspecify
endmodule
`ifdef verifault
`nosuppress_faults
`disable_portfaults
`endif
`endcelldefine