v15col1_m.top.v
29.1 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
// opc_vsh Version 6.1.1 2001/02/23
`define OPC_VSH_VER 611
`timescale 1ps / 1ps
`ifdef VCS
`undef OPC_VLG
`else // !( VCS )
`define OPC_VLG
`expand_vectornets
`endif // for VCS
`define OPC_CIRCUIT_INSTANCE A5C382CORE_top.A5C382CORE_shell.A5C382CORE
`define OPC_TEST_PERIOD 20000
`define OPC_TEST_STROBE 17000
`define OPC_BUSCHK_WIN_WIDTH 20000
`define OPC_IOCHK_WIN_WIDTH 20000
// ---------------------------------------------------------------------
// Top Module
// ---------------------------------------------------------------------
module A5C382CORE_top ;
integer err_count, err_write, pattern ;
integer is_cmp_pull, is_tbl_created ;
reg asterisk ;
reg [112:0] print_type ;
// define input signals
wire PMPAL_I, PNTPL, PSRGB0, PSRGB1, PSRGB2, PSRGB3, PSRGB4, PSRGB5, PSRGB6, PTCLK,
PTESTI0, PTRAPB_I, PTSYNCB;
wire PMPAL_I_i, PNTPL_i, PSRGB0_i, PSRGB1_i, PSRGB2_i, PSRGB3_i, PSRGB4_i, PSRGB5_i,
PSRGB6_i, PTCLK_i, PTESTI0_i, PTRAPB_I_i, PTSYNCB_i;
// define output signals
wire CLK24DAC, COUT0, COUT1, COUT2, COUT3, COUT4, COUT5, COUT6, COUT7, PCSYNCB,
PMPAL_O, PTRAPB_O, VOUT0, VOUT1, VOUT2, VOUT3, VOUT4, VOUT5, VOUT6, VOUT7, YOUT0,
YOUT1, YOUT2, YOUT3, YOUT4, YOUT5, YOUT6, YOUT7;
wire CLK24DAC_d, COUT0_d, COUT1_d, COUT2_d, COUT3_d, COUT4_d, COUT5_d, COUT6_d,
COUT7_d, PCSYNCB_d, PMPAL_O_d, PTRAPB_O_d, VOUT0_d, VOUT1_d, VOUT2_d, VOUT3_d, VOUT4_d,
VOUT5_d, VOUT6_d, VOUT7_d, YOUT0_d, YOUT1_d, YOUT2_d, YOUT3_d, YOUT4_d, YOUT5_d,
YOUT6_d, YOUT7_d;
wire CLK24DAC_o, COUT0_o, COUT1_o, COUT2_o, COUT3_o, COUT4_o, COUT5_o, COUT6_o,
COUT7_o, PCSYNCB_o, PMPAL_O_o, PTRAPB_O_o, VOUT0_o, VOUT1_o, VOUT2_o, VOUT3_o, VOUT4_o,
VOUT5_o, VOUT6_o, VOUT7_o, YOUT0_o, YOUT1_o, YOUT2_o, YOUT3_o, YOUT4_o, YOUT5_o,
YOUT6_o, YOUT7_o;
wire CLK24DAC_e, COUT0_e, COUT1_e, COUT2_e, COUT3_e, COUT4_e, COUT5_e, COUT6_e,
COUT7_e, PCSYNCB_e, PMPAL_O_e, PTRAPB_O_e, VOUT0_e, VOUT1_e, VOUT2_e, VOUT3_e, VOUT4_e,
VOUT5_e, VOUT6_e, VOUT7_e, YOUT0_e, YOUT1_e, YOUT2_e, YOUT3_e, YOUT4_e, YOUT5_e,
YOUT6_e, YOUT7_e;
// define bidirectional signals
// assign input signals
assign PMPAL_I = PMPAL_I_i ;
assign PNTPL = PNTPL_i ;
assign PSRGB0 = PSRGB0_i ;
assign PSRGB1 = PSRGB1_i ;
assign PSRGB2 = PSRGB2_i ;
assign PSRGB3 = PSRGB3_i ;
assign PSRGB4 = PSRGB4_i ;
assign PSRGB5 = PSRGB5_i ;
assign PSRGB6 = PSRGB6_i ;
assign PTCLK = PTCLK_i ;
assign PTESTI0 = PTESTI0_i ;
assign PTRAPB_I = PTRAPB_I_i ;
assign PTSYNCB = PTSYNCB_i ;
`ifdef old_modejudge
`else
`endif
// assign dummy signals of output to control of event scheduling
assign CLK24DAC_d = CLK24DAC ;
assign COUT0_d = COUT0 ;
assign COUT1_d = COUT1 ;
assign COUT2_d = COUT2 ;
assign COUT3_d = COUT3 ;
assign COUT4_d = COUT4 ;
assign COUT5_d = COUT5 ;
assign COUT6_d = COUT6 ;
assign COUT7_d = COUT7 ;
assign PCSYNCB_d = PCSYNCB ;
assign PMPAL_O_d = PMPAL_O ;
assign PTRAPB_O_d = PTRAPB_O ;
assign VOUT0_d = VOUT0 ;
assign VOUT1_d = VOUT1 ;
assign VOUT2_d = VOUT2 ;
assign VOUT3_d = VOUT3 ;
assign VOUT4_d = VOUT4 ;
assign VOUT5_d = VOUT5 ;
assign VOUT6_d = VOUT6 ;
assign VOUT7_d = VOUT7 ;
assign YOUT0_d = YOUT0 ;
assign YOUT1_d = YOUT1 ;
assign YOUT2_d = YOUT2 ;
assign YOUT3_d = YOUT3 ;
assign YOUT4_d = YOUT4 ;
assign YOUT5_d = YOUT5 ;
assign YOUT6_d = YOUT6 ;
assign YOUT7_d = YOUT7 ;
// assign expected value signals
assign CLK24DAC_e = CLK24DAC_o ;
assign COUT0_e = COUT0_o ;
assign COUT1_e = COUT1_o ;
assign COUT2_e = COUT2_o ;
assign COUT3_e = COUT3_o ;
assign COUT4_e = COUT4_o ;
assign COUT5_e = COUT5_o ;
assign COUT6_e = COUT6_o ;
assign COUT7_e = COUT7_o ;
assign PCSYNCB_e = PCSYNCB_o ;
assign PMPAL_O_e = PMPAL_O_o ;
assign PTRAPB_O_e = PTRAPB_O_o ;
assign VOUT0_e = VOUT0_o ;
assign VOUT1_e = VOUT1_o ;
assign VOUT2_e = VOUT2_o ;
assign VOUT3_e = VOUT3_o ;
assign VOUT4_e = VOUT4_o ;
assign VOUT5_e = VOUT5_o ;
assign VOUT6_e = VOUT6_o ;
assign VOUT7_e = VOUT7_o ;
assign YOUT0_e = YOUT0_o ;
assign YOUT1_e = YOUT1_o ;
assign YOUT2_e = YOUT2_o ;
assign YOUT3_e = YOUT3_o ;
assign YOUT4_e = YOUT4_o ;
assign YOUT5_e = YOUT5_o ;
assign YOUT6_e = YOUT6_o ;
assign YOUT7_e = YOUT7_o ;
`ifdef old_modejudge
`else
`endif
// unify the format of displaying about time information
initial $timeformat( -12, 0, " [ps]" ) ;
// call circuit
A5C382CORE_shell A5C382CORE_shell(
.CLK24DAC( CLK24DAC ), .COUT0( COUT0 ), .COUT1( COUT1 ), .COUT2( COUT2 ),
.COUT3( COUT3 ), .COUT4( COUT4 ), .COUT5( COUT5 ), .COUT6( COUT6 ),
.COUT7( COUT7 ), .PCSYNCB( PCSYNCB ), .PMPAL_I( PMPAL_I ),
.PMPAL_O( PMPAL_O ), .PNTPL( PNTPL ), .PSRGB0( PSRGB0 ),
.PSRGB1( PSRGB1 ), .PSRGB2( PSRGB2 ), .PSRGB3( PSRGB3 ),
.PSRGB4( PSRGB4 ), .PSRGB5( PSRGB5 ), .PSRGB6( PSRGB6 ), .PTCLK( PTCLK ),
.PTESTI0( PTESTI0 ), .PTRAPB_I( PTRAPB_I ), .PTRAPB_O( PTRAPB_O ),
.PTSYNCB( PTSYNCB ), .VOUT0( VOUT0 ), .VOUT1( VOUT1 ), .VOUT2( VOUT2 ),
.VOUT3( VOUT3 ), .VOUT4( VOUT4 ), .VOUT5( VOUT5 ), .VOUT6( VOUT6 ),
.VOUT7( VOUT7 ), .YOUT0( YOUT0 ), .YOUT1( YOUT1 ), .YOUT2( YOUT2 ),
.YOUT3( YOUT3 ), .YOUT4( YOUT4 ), .YOUT5( YOUT5 ), .YOUT6( YOUT6 ),
.YOUT7( YOUT7 )
) ;
// call pattern
A5C382CORE_pat A5C382CORE_pat(
.CLK24DAC_o( CLK24DAC_o ), .COUT0_o( COUT0_o ), .COUT1_o( COUT1_o ),
.COUT2_o( COUT2_o ), .COUT3_o( COUT3_o ), .COUT4_o( COUT4_o ),
.COUT5_o( COUT5_o ), .COUT6_o( COUT6_o ), .COUT7_o( COUT7_o ),
.PCSYNCB_o( PCSYNCB_o ), .PMPAL_O_o( PMPAL_O_o ),
.PTRAPB_O_o( PTRAPB_O_o ), .VOUT0_o( VOUT0_o ), .VOUT1_o( VOUT1_o ),
.VOUT2_o( VOUT2_o ), .VOUT3_o( VOUT3_o ), .VOUT4_o( VOUT4_o ),
.VOUT5_o( VOUT5_o ), .VOUT6_o( VOUT6_o ), .VOUT7_o( VOUT7_o ),
.YOUT0_o( YOUT0_o ), .YOUT1_o( YOUT1_o ), .YOUT2_o( YOUT2_o ),
.YOUT3_o( YOUT3_o ), .YOUT4_o( YOUT4_o ), .YOUT5_o( YOUT5_o ),
.YOUT6_o( YOUT6_o ), .YOUT7_o( YOUT7_o ),
.PMPAL_I_i( PMPAL_I_i ), .PNTPL_i( PNTPL_i ), .PSRGB0_i( PSRGB0_i ),
.PSRGB1_i( PSRGB1_i ), .PSRGB2_i( PSRGB2_i ), .PSRGB3_i( PSRGB3_i ),
.PSRGB4_i( PSRGB4_i ), .PSRGB5_i( PSRGB5_i ), .PSRGB6_i( PSRGB6_i ),
.PTCLK_i( PTCLK_i ), .PTESTI0_i( PTESTI0_i ), .PTRAPB_I_i( PTRAPB_I_i ),
.PTSYNCB_i( PTSYNCB_i )
) ;
// sdf annotator
initial if ( $test$plusargs( "annotate" ) ) begin
$sdf_annotate(
"A5C382CORE.VCS.sdf",
`OPC_CIRCUIT_INSTANCE
/* No configuration file */
) ;
end
// bus check
integer f_bus;
initial if ( $test$plusargs( "bus" ) ) begin
f_bus = $fopen( "A5C382CORE.bus" ) ;
$bus( f_bus, `OPC_CIRCUIT_INSTANCE , `OPC_BUSCHK_WIN_WIDTH ) ;
end
// io check
integer f_iochk;
initial if ( $test$plusargs( "iochk" ) ) begin
f_iochk = $fopen( "A5C382CORE.iochk" ) ;
$iochk( f_iochk, `OPC_CIRCUIT_INSTANCE , `OPC_IOCHK_WIN_WIDTH ) ;
end
// delay time overperiod check
integer f_ovprd;
initial if ( $test$plusargs( "ovprd" ) ) begin
f_ovprd = $fopen( "A5C382CORE.ovprd" ) ;
forever fork
#`OPC_TEST_PERIOD ;
#`OPC_TEST_STROBE $evchk( f_ovprd, A5C382CORE_top.A5C382CORE_shell ) ;
join
end
// start toggle check
integer f_toggle;
initial if ( $test$plusargs( "toggle" ) ) begin
f_toggle = $fopen( "A5C382CORE.toggle" ) ;
$toggle( f_toggle, `OPC_CIRCUIT_INSTANCE ) ;
end
// write trc
initial if ( $test$plusargs( "trc" ) ) begin
$trc_dump(
"A5C382CORE.trc",
`OPC_CIRCUIT_INSTANCE , `OPC_TEST_PERIOD,
"/opc/cb12_V3.1.0/solaris/lib/CB12/common/iobuffer/CB12.testlib", CLK24DAC_e,
COUT0_e, COUT1_e, COUT2_e, COUT3_e, COUT4_e, COUT5_e, COUT6_e, COUT7_e, PCSYNCB_e,
PMPAL_O_e, PTRAPB_O_e, VOUT0_e, VOUT1_e, VOUT2_e, VOUT3_e, VOUT4_e, VOUT5_e, VOUT6_e,
VOUT7_e, YOUT0_e, YOUT1_e, YOUT2_e, YOUT3_e, YOUT4_e, YOUT5_e, YOUT6_e, YOUT7_e
) ;
end
// write summary
initial begin
err_count = -1 ; // tricky !
$summary(
`OPC_CIRCUIT_INSTANCE , print_type, err_count, `OPC_TEST_PERIOD
) ;
end
`ifdef OPC_VLG
// dump for dynamic power calculation
integer f_dpc;
initial if ( $test$plusargs( "dpc" ) ) begin
f_dpc = $fopen( "A5C382CORE.dpc" ) ;
$dpc_dump(
f_dpc, `OPC_CIRCUIT_INSTANCE ,
"/opc/cb12_V3.1.0/solaris/lib/CB12/common/iobuffer/CB12.testlib"
) ;
end
`endif // for OPC_VLG
`ifdef OPC_USE_OBSOLETE_PLI_TASKS
parameter period = `OPC_TEST_PERIOD ;
parameter strobe = `OPC_TEST_STROBE ;
parameter bus_window_size = `OPC_BUSCHK_WIN_WIDTH ;
parameter iochk_window_size = `OPC_IOCHK_WIN_WIDTH ;
// write tssi pattern
integer f_tssi_pat, f_tssi_sig;
initial if ( $test$plusargs( "tssi" ) ) begin
f_tssi_pat = $fopen( "A5C382CORE.tssi_pat" ) ;
f_tssi_sig = $fopen( "A5C382CORE.tssi_sig" ) ;
$tssi(
f_tssi_pat, f_tssi_sig,
A5C382CORE_top.A5C382CORE_shell.A5C382CORE,
"/opc/cb12_V3.1.0/solaris/lib/CB12/common/iobuffer/CB12.testlib" ) ;
end
function [7:0] _output;
input value;
case ( value )
1'b0: _output = "L";
1'b1: _output = "H";
1'bz: _output = "T";
1'bx: _output = "X";
endcase
endfunction
// write error pattern numbers
integer f_error;
initial if ( $test$plusargs( "compare" ) ) begin
err_count = 0;
`ifdef OPC_VLG
f_error = $fopen( "A5C382CORE.error" ) ;
$fdisplay( f_error, " E R R O R P A T T E R N N U M B E R" ) ;
$fdisplay( f_error, "" ) ;
$fwrite_finish( f_error, "\n" ) ;
forever begin
err_write = 0;
fork
#period;
#strobe if ( asterisk && !err_write ) begin
pattern = $time / period + 1;
$fwrite( f_error, pattern ) ;
err_count = err_count + 1;
if ( err_count % 6 === 0 ) $fwrite( f_error, "\n" ) ;
err_write = 1;
end
join
end
`endif
end
else
err_count = -1;
`ifdef OPC_VLG
// write monitor file headers
integer f_mon ;
initial if (
$test$plusargs( "monitor" ) ||
$test$plusargs( "strobe" ) ||
$test$plusargs( "err_only" )
) begin
f_mon = $fopen( "A5C382CORE.mon" ) ;
$fwrite( f_mon, " NEC SIMULATION ENVIRONMENT\n" ) ;
$fwrite( f_mon, "\n" ) ;
$fwrite( f_mon, " Design Name is : A5C382CORE\n" ) ;
$fwrite( f_mon, "\n" ) ;
if ( $test$plusargs( "compare" ) ) begin
$fwrite( f_mon, " COMPARE MATRIX\n" ) ;
$fwrite( f_mon, "\n" ) ;
$fwrite( f_mon, " EXPECTED VALUE\n" ) ;
$fwrite( f_mon, " +---@---+---+---+---+\n" ) ;
$fwrite( f_mon, " S | @ 0 | 1 | X | Z |\n" ) ;
$fwrite( f_mon, " I @@@@@@@@@@@@@@@@@@@@@\n" ) ;
$fwrite( f_mon, " M | 0 @ 0 | Q | 0 | G |\n" ) ;
$fwrite( f_mon, " U +---@---+---+---+---+\n" ) ;
$fwrite( f_mon, " L V | 1 @ Y | 1 | 1 | T |\n" ) ;
$fwrite( f_mon, " A A +---@---+---+---+---+\n" ) ;
$fwrite( f_mon, " T L | X @ M | N | X | H |\n" ) ;
$fwrite( f_mon, " E U +---@---+---+---+---+\n" ) ;
$fwrite( f_mon, " D E | Z @ L | K | Z | Z |\n" ) ;
$fwrite( f_mon, " +---@---+---+---+---+\n" ) ;
if ( $test$plusargs( "cmp_pull" ) ) begin
$fwrite( f_mon, " | - @ R | P | - | - |\n" ) ;
$fwrite( f_mon, " +---@---+---+---+---+\n" ) ;
$fwrite( f_mon, " | + @ J | V | + | + |\n" ) ;
$fwrite( f_mon, " +---@---+---+---+---+\n" ) ;
$fwrite( f_mon, " | W @ ? | ! | W | W |\n" ) ;
$fwrite( f_mon, " +---@---+---+---+---+\n" ) ;
end
$fwrite( f_mon, "\n" ) ;
end
$fwrite( f_mon, " " ) ;
$fwrite( f_mon, " \n" ) ;
$fwrite( f_mon, " " ) ;
$fwrite( f_mon, " \n" ) ;
$fwrite( f_mon, " P C " ) ;
$fwrite( f_mon, "P \n" ) ;
$fwrite( f_mon, " P PTP L PP" ) ;
$fwrite( f_mon, "T \n" ) ;
$fwrite( f_mon, " M PPPPPPP TRT K CM" ) ;
$fwrite( f_mon, "R \n" ) ;
$fwrite( f_mon, " PPSSSSSSSPEAS 2CCCCCCCCSP" ) ;
$fwrite( f_mon, "AVVVVVVVVYYYYYYYY\n" ) ;
$fwrite( f_mon, " T ANRRRRRRRTSPY 4OOOOOOOOYA" ) ;
$fwrite( f_mon, "POOOOOOOOOOOOOOOO\n" ) ;
$fwrite( f_mon, " I LTGGGGGGGCTBN DUUUUUUUUNL" ) ;
$fwrite( f_mon, "BUUUUUUUUUUUUUUUU\n" ) ;
$fwrite( f_mon, " M _PBBBBBBBLI_C ATTTTTTTTC_" ) ;
$fwrite( f_mon, "_TTTTTTTTTTTTTTTT\n" ) ;
$fwrite( f_mon, " E IL0123456K0IB C01234567BO" ) ;
$fwrite( f_mon, "O0123456701234567\n" ) ;
end
// compare simulated value with expected value
initial if ( ! $test$plusargs( "compare" ) )
asterisk = 0 ;
else begin
if ( is_tbl_created !== 1 ) begin
is_cmp_pull = $test$plusargs( "cmp_pull" ) ;
$mk_value_tbl( is_cmp_pull ) ;
is_tbl_created = 1 ;
end
if ( $test$plusargs( "monitor" ) )
forever @(
CLK24DAC or CLK24DAC_o or COUT0 or COUT0_o or COUT1 or COUT1_o or
COUT2 or COUT2_o or COUT3 or COUT3_o or COUT4 or COUT4_o or
COUT5 or COUT5_o or COUT6 or COUT6_o or COUT7 or COUT7_o or
PCSYNCB or PCSYNCB_o or PMPAL_O or PMPAL_O_o or
PTRAPB_O or PTRAPB_O_o or VOUT0 or VOUT0_o or VOUT1 or VOUT1_o or
VOUT2 or VOUT2_o or VOUT3 or VOUT3_o or VOUT4 or VOUT4_o or
VOUT5 or VOUT5_o or VOUT6 or VOUT6_o or VOUT7 or VOUT7_o or
YOUT0 or YOUT0_o or YOUT1 or YOUT1_o or YOUT2 or YOUT2_o or
YOUT3 or YOUT3_o or YOUT4 or YOUT4_o or YOUT5 or YOUT5_o or
YOUT6 or YOUT6_o or YOUT7 or YOUT7_o
)
asterisk = $_error(
CLK24DAC, CLK24DAC_o, COUT0, COUT0_o, COUT1, COUT1_o, COUT2, COUT2_o,
COUT3, COUT3_o, COUT4, COUT4_o, COUT5, COUT5_o, COUT6, COUT6_o,
COUT7, COUT7_o, PCSYNCB, PCSYNCB_o, PMPAL_O, PMPAL_O_o,
PTRAPB_O, PTRAPB_O_o, VOUT0, VOUT0_o, VOUT1, VOUT1_o, VOUT2, VOUT2_o,
VOUT3, VOUT3_o, VOUT4, VOUT4_o, VOUT5, VOUT5_o, VOUT6, VOUT6_o,
VOUT7, VOUT7_o, YOUT0, YOUT0_o, YOUT1, YOUT1_o, YOUT2, YOUT2_o,
YOUT3, YOUT3_o, YOUT4, YOUT4_o, YOUT5, YOUT5_o, YOUT6, YOUT6_o,
YOUT7, YOUT7_o
) ;
else
forever fork
#period ;
#strobe asterisk = $_error(
CLK24DAC, CLK24DAC_o, COUT0, COUT0_o, COUT1, COUT1_o,
COUT2, COUT2_o, COUT3, COUT3_o, COUT4, COUT4_o, COUT5, COUT5_o,
COUT6, COUT6_o, COUT7, COUT7_o, PCSYNCB, PCSYNCB_o,
PMPAL_O, PMPAL_O_o, PTRAPB_O, PTRAPB_O_o, VOUT0, VOUT0_o,
VOUT1, VOUT1_o, VOUT2, VOUT2_o, VOUT3, VOUT3_o, VOUT4, VOUT4_o,
VOUT5, VOUT5_o, VOUT6, VOUT6_o, VOUT7, VOUT7_o, YOUT0, YOUT0_o,
YOUT1, YOUT1_o, YOUT2, YOUT2_o, YOUT3, YOUT3_o, YOUT4, YOUT4_o,
YOUT5, YOUT5_o, YOUT6, YOUT6_o, YOUT7, YOUT7_o
) ;
join
end
// monitoring routine
initial if ( $test$plusargs( "monitor" ) ) begin
print_type = "Monitor";
if ( is_tbl_created !== 1 ) begin
is_cmp_pull = $test$plusargs( "cmp_pull" ) ;
$mk_value_tbl( is_cmp_pull ) ;
is_tbl_created = 1 ;
end
if ( $test$plusargs( "compare" ) )
$fmonitor(
f_mon, $time,, "%s", ( asterisk == 1 ? "*" : " " ), PMPAL_I, PNTPL,
PSRGB0, PSRGB1, PSRGB2, PSRGB3, PSRGB4, PSRGB5, PSRGB6, PTCLK,
PTESTI0, PTRAPB_I, PTSYNCB, ,
"%s", $_compare( CLK24DAC, CLK24DAC_o ),
"%s", $_compare( COUT0, COUT0_o ),
"%s", $_compare( COUT1, COUT1_o ),
"%s", $_compare( COUT2, COUT2_o ),
"%s", $_compare( COUT3, COUT3_o ),
"%s", $_compare( COUT4, COUT4_o ),
"%s", $_compare( COUT5, COUT5_o ),
"%s", $_compare( COUT6, COUT6_o ),
"%s", $_compare( COUT7, COUT7_o ),
"%s", $_compare( PCSYNCB, PCSYNCB_o ),
"%s", $_compare( PMPAL_O, PMPAL_O_o ),
"%s", $_compare( PTRAPB_O, PTRAPB_O_o ),
"%s", $_compare( VOUT0, VOUT0_o ),
"%s", $_compare( VOUT1, VOUT1_o ),
"%s", $_compare( VOUT2, VOUT2_o ),
"%s", $_compare( VOUT3, VOUT3_o ),
"%s", $_compare( VOUT4, VOUT4_o ),
"%s", $_compare( VOUT5, VOUT5_o ),
"%s", $_compare( VOUT6, VOUT6_o ),
"%s", $_compare( VOUT7, VOUT7_o ),
"%s", $_compare( YOUT0, YOUT0_o ),
"%s", $_compare( YOUT1, YOUT1_o ),
"%s", $_compare( YOUT2, YOUT2_o ),
"%s", $_compare( YOUT3, YOUT3_o ),
"%s", $_compare( YOUT4, YOUT4_o ),
"%s", $_compare( YOUT5, YOUT5_o ),
"%s", $_compare( YOUT6, YOUT6_o ), "%s", $_compare( YOUT7, YOUT7_o )
) ;
else
$fmonitor(
f_mon, $time,, " ", PMPAL_I, PNTPL, PSRGB0, PSRGB1, PSRGB2, PSRGB3,
PSRGB4, PSRGB5, PSRGB6, PTCLK, PTESTI0, PTRAPB_I, PTSYNCB, ,
"%s", $_convert( CLK24DAC ), "%s", $_convert( COUT0 ),
"%s", $_convert( COUT1 ), "%s", $_convert( COUT2 ),
"%s", $_convert( COUT3 ), "%s", $_convert( COUT4 ),
"%s", $_convert( COUT5 ), "%s", $_convert( COUT6 ),
"%s", $_convert( COUT7 ), "%s", $_convert( PCSYNCB ),
"%s", $_convert( PMPAL_O ), "%s", $_convert( PTRAPB_O ),
"%s", $_convert( VOUT0 ), "%s", $_convert( VOUT1 ),
"%s", $_convert( VOUT2 ), "%s", $_convert( VOUT3 ),
"%s", $_convert( VOUT4 ), "%s", $_convert( VOUT5 ),
"%s", $_convert( VOUT6 ), "%s", $_convert( VOUT7 ),
"%s", $_convert( YOUT0 ), "%s", $_convert( YOUT1 ),
"%s", $_convert( YOUT2 ), "%s", $_convert( YOUT3 ),
"%s", $_convert( YOUT4 ), "%s", $_convert( YOUT5 ),
"%s", $_convert( YOUT6 ), "%s", $_convert( YOUT7 )
) ;
end
// strobing routine
initial
if ( $test$plusargs( "strobe" ) ) begin
print_type = "Strobe";
if ( is_tbl_created !== 1 ) begin
is_cmp_pull = $test$plusargs( "cmp_pull" ) ;
$mk_value_tbl( is_cmp_pull ) ;
is_tbl_created = 1 ;
end
if ( $test$plusargs( "compare" ) )
forever fork
#period;
#strobe $fdisplay(
f_mon, $time,, "%s", ( asterisk == 1 ? "*" : " " ), PMPAL_I,
PNTPL, PSRGB0, PSRGB1, PSRGB2, PSRGB3, PSRGB4, PSRGB5, PSRGB6,
PTCLK, PTESTI0, PTRAPB_I, PTSYNCB, ,
"%s", $_compare( CLK24DAC, CLK24DAC_o ),
"%s", $_compare( COUT0, COUT0_o ),
"%s", $_compare( COUT1, COUT1_o ),
"%s", $_compare( COUT2, COUT2_o ),
"%s", $_compare( COUT3, COUT3_o ),
"%s", $_compare( COUT4, COUT4_o ),
"%s", $_compare( COUT5, COUT5_o ),
"%s", $_compare( COUT6, COUT6_o ),
"%s", $_compare( COUT7, COUT7_o ),
"%s", $_compare( PCSYNCB, PCSYNCB_o ),
"%s", $_compare( PMPAL_O, PMPAL_O_o ),
"%s", $_compare( PTRAPB_O, PTRAPB_O_o ),
"%s", $_compare( VOUT0, VOUT0_o ),
"%s", $_compare( VOUT1, VOUT1_o ),
"%s", $_compare( VOUT2, VOUT2_o ),
"%s", $_compare( VOUT3, VOUT3_o ),
"%s", $_compare( VOUT4, VOUT4_o ),
"%s", $_compare( VOUT5, VOUT5_o ),
"%s", $_compare( VOUT6, VOUT6_o ),
"%s", $_compare( VOUT7, VOUT7_o ),
"%s", $_compare( YOUT0, YOUT0_o ),
"%s", $_compare( YOUT1, YOUT1_o ),
"%s", $_compare( YOUT2, YOUT2_o ),
"%s", $_compare( YOUT3, YOUT3_o ),
"%s", $_compare( YOUT4, YOUT4_o ),
"%s", $_compare( YOUT5, YOUT5_o ),
"%s", $_compare( YOUT6, YOUT6_o ),
"%s", $_compare( YOUT7, YOUT7_o )
) ;
join
else
forever fork
#period;
#strobe $fdisplay(
f_mon, $time,, " ", PMPAL_I, PNTPL, PSRGB0, PSRGB1, PSRGB2,
PSRGB3, PSRGB4, PSRGB5, PSRGB6, PTCLK, PTESTI0, PTRAPB_I,
PTSYNCB, , "%s", $_convert( CLK24DAC ), "%s", $_convert( COUT0 ),
"%s", $_convert( COUT1 ), "%s", $_convert( COUT2 ),
"%s", $_convert( COUT3 ), "%s", $_convert( COUT4 ),
"%s", $_convert( COUT5 ), "%s", $_convert( COUT6 ),
"%s", $_convert( COUT7 ), "%s", $_convert( PCSYNCB ),
"%s", $_convert( PMPAL_O ), "%s", $_convert( PTRAPB_O ),
"%s", $_convert( VOUT0 ), "%s", $_convert( VOUT1 ),
"%s", $_convert( VOUT2 ), "%s", $_convert( VOUT3 ),
"%s", $_convert( VOUT4 ), "%s", $_convert( VOUT5 ),
"%s", $_convert( VOUT6 ), "%s", $_convert( VOUT7 ),
"%s", $_convert( YOUT0 ), "%s", $_convert( YOUT1 ),
"%s", $_convert( YOUT2 ), "%s", $_convert( YOUT3 ),
"%s", $_convert( YOUT4 ), "%s", $_convert( YOUT5 ),
"%s", $_convert( YOUT6 ), "%s", $_convert( YOUT7 )
) ;
join
end
// err_only routine
initial
if ( $test$plusargs( "err_only" ) ) begin
print_type = "Err_only";
if ( is_tbl_created !== 1 ) begin
is_cmp_pull = $test$plusargs( "cmp_pull" ) ;
$mk_value_tbl( is_cmp_pull ) ;
is_tbl_created = 1 ;
end
forever fork
#period;
#strobe if ( asterisk ) $fdisplay(
f_mon, $time,, "%s", "*", PMPAL_I, PNTPL, PSRGB0, PSRGB1, PSRGB2,
PSRGB3, PSRGB4, PSRGB5, PSRGB6, PTCLK, PTESTI0, PTRAPB_I, PTSYNCB, ,
"%s", $_compare( CLK24DAC, CLK24DAC_o ),
"%s", $_compare( COUT0, COUT0_o ),
"%s", $_compare( COUT1, COUT1_o ),
"%s", $_compare( COUT2, COUT2_o ),
"%s", $_compare( COUT3, COUT3_o ),
"%s", $_compare( COUT4, COUT4_o ),
"%s", $_compare( COUT5, COUT5_o ),
"%s", $_compare( COUT6, COUT6_o ),
"%s", $_compare( COUT7, COUT7_o ),
"%s", $_compare( PCSYNCB, PCSYNCB_o ),
"%s", $_compare( PMPAL_O, PMPAL_O_o ),
"%s", $_compare( PTRAPB_O, PTRAPB_O_o ),
"%s", $_compare( VOUT0, VOUT0_o ),
"%s", $_compare( VOUT1, VOUT1_o ),
"%s", $_compare( VOUT2, VOUT2_o ),
"%s", $_compare( VOUT3, VOUT3_o ),
"%s", $_compare( VOUT4, VOUT4_o ),
"%s", $_compare( VOUT5, VOUT5_o ),
"%s", $_compare( VOUT6, VOUT6_o ),
"%s", $_compare( VOUT7, VOUT7_o ),
"%s", $_compare( YOUT0, YOUT0_o ),
"%s", $_compare( YOUT1, YOUT1_o ),
"%s", $_compare( YOUT2, YOUT2_o ),
"%s", $_compare( YOUT3, YOUT3_o ),
"%s", $_compare( YOUT4, YOUT4_o ),
"%s", $_compare( YOUT5, YOUT5_o ),
"%s", $_compare( YOUT6, YOUT6_o ), "%s", $_compare( YOUT7, YOUT7_o )
) ;
join
end
// write graphical wave
initial if ( $test$plusargs( "waves" ) ) begin
$gr_waves( "PMPAL_I", PMPAL_I, "PNTPL", PNTPL, "PSRGB0", PSRGB0, "PSRGB1", PSRGB1,
"PSRGB2", PSRGB2, "PSRGB3", PSRGB3, "PSRGB4", PSRGB4, "PSRGB5", PSRGB5, "PSRGB6",
PSRGB6, "PTCLK", PTCLK, "PTESTI0", PTESTI0, "PTRAPB_I", PTRAPB_I, "PTSYNCB", PTSYNCB,
"CLK24DAC", CLK24DAC, "COUT0", COUT0, "COUT1", COUT1, "COUT2", COUT2, "COUT3", COUT3,
"COUT4", COUT4, "COUT5", COUT5, "COUT6", COUT6, "COUT7", COUT7, "PCSYNCB", PCSYNCB,
"PMPAL_O", PMPAL_O, "PTRAPB_O", PTRAPB_O, "VOUT0", VOUT0, "VOUT1", VOUT1, "VOUT2",
VOUT2, "VOUT3", VOUT3, "VOUT4", VOUT4, "VOUT5", VOUT5, "VOUT6", VOUT6, "VOUT7",
VOUT7, "YOUT0", YOUT0, "YOUT1", YOUT1, "YOUT2", YOUT2, "YOUT3", YOUT3, "YOUT4",
YOUT4, "YOUT5", YOUT5, "YOUT6", YOUT6, "YOUT7", YOUT7 ) ;
end
// new strobing routine
initial
if ( $test$plusargs( "stbcmp" ) ) begin
if ( is_tbl_created !== 1 ) begin
is_cmp_pull = $test$plusargs( "cmp_pull" ) ;
$mk_value_tbl( is_cmp_pull ) ;
is_tbl_created = 1 ;
end
forever fork
#period;
#strobe $_stbcmp(
CLK24DAC_o, CLK24DAC, COUT0_o, COUT0, COUT1_o, COUT1,
COUT2_o, COUT2, COUT3_o, COUT3, COUT4_o, COUT4, COUT5_o, COUT5,
COUT6_o, COUT6, COUT7_o, COUT7, PCSYNCB_o, PCSYNCB,
PMPAL_O_o, PMPAL_O, PTRAPB_O_o, PTRAPB_O, VOUT0_o, VOUT0,
VOUT1_o, VOUT1, VOUT2_o, VOUT2, VOUT3_o, VOUT3, VOUT4_o, VOUT4,
VOUT5_o, VOUT5, VOUT6_o, VOUT6, VOUT7_o, VOUT7, YOUT0_o, YOUT0,
YOUT1_o, YOUT1, YOUT2_o, YOUT2, YOUT3_o, YOUT3, YOUT4_o, YOUT4,
YOUT5_o, YOUT5, YOUT6_o, YOUT6, YOUT7_o, YOUT7
) ;
join
end
// calculate power consumption
integer f_pcalc;
initial if ( $test$plusargs( "pcalc" ) ) begin
f_pcalc = $fopen( "A5C382CORE.pcalc" ) ;
$pcalc_load_netcap(
"A5C382CORE.netcap",
A5C382CORE_top.A5C382CORE_shell.A5C382CORE
) ;
$pcalc_load_powlib( "A5C382CORE.powlib" ) ;
$pcalc( f_pcalc, A5C382CORE_top.A5C382CORE_shell.A5C382CORE ) ;
end
// write tpd
integer f_tpd;
initial if ( $test$plusargs( "tpd" ) ) begin
f_tpd = $fopen( "A5C382CORE.tpd" ) ;
$tpd(
f_tpd, A5C382CORE_top.A5C382CORE_shell.A5C382CORE, period
) ;
end
`endif // for OPC_VLG
`endif // for OPC_USE_OBSOLETE_PLI_TASKS
endmodule
// ---------------------------------------------------------------------
// Intermediate Module(for eventcheck only)
// ---------------------------------------------------------------------
module A5C382CORE_shell(
CLK24DAC, COUT0, COUT1, COUT2, COUT3, COUT4, COUT5, COUT6, COUT7, PCSYNCB,
PMPAL_I, PMPAL_O, PNTPL, PSRGB0, PSRGB1, PSRGB2, PSRGB3, PSRGB4, PSRGB5,
PSRGB6, PTCLK, PTESTI0, PTRAPB_I, PTRAPB_O, PTSYNCB, VOUT0, VOUT1, VOUT2,
VOUT3, VOUT4, VOUT5, VOUT6, VOUT7, YOUT0, YOUT1, YOUT2, YOUT3, YOUT4,
YOUT5, YOUT6, YOUT7
) ;
input PMPAL_I, PNTPL, PSRGB0, PSRGB1, PSRGB2, PSRGB3, PSRGB4, PSRGB5, PSRGB6, PTCLK,
PTESTI0, PTRAPB_I, PTSYNCB;
output CLK24DAC, COUT0, COUT1, COUT2, COUT3, COUT4, COUT5, COUT6, COUT7, PCSYNCB,
PMPAL_O, PTRAPB_O, VOUT0, VOUT1, VOUT2, VOUT3, VOUT4, VOUT5, VOUT6, VOUT7, YOUT0,
YOUT1, YOUT2, YOUT3, YOUT4, YOUT5, YOUT6, YOUT7;
// call circuit
A5C382CORE A5C382CORE(
.CLK24DAC( CLK24DAC ), .COUT0( COUT0 ), .COUT1( COUT1 ), .COUT2( COUT2 ),
.COUT3( COUT3 ), .COUT4( COUT4 ), .COUT5( COUT5 ), .COUT6( COUT6 ),
.COUT7( COUT7 ), .PCSYNCB( PCSYNCB ), .PMPAL_I( PMPAL_I ),
.PMPAL_O( PMPAL_O ), .PNTPL( PNTPL ), .PSRGB0( PSRGB0 ),
.PSRGB1( PSRGB1 ), .PSRGB2( PSRGB2 ), .PSRGB3( PSRGB3 ),
.PSRGB4( PSRGB4 ), .PSRGB5( PSRGB5 ), .PSRGB6( PSRGB6 ), .PTCLK( PTCLK ),
.PTESTI0( PTESTI0 ), .PTRAPB_I( PTRAPB_I ), .PTRAPB_O( PTRAPB_O ),
.PTSYNCB( PTSYNCB ), .VOUT0( VOUT0 ), .VOUT1( VOUT1 ), .VOUT2( VOUT2 ),
.VOUT3( VOUT3 ), .VOUT4( VOUT4 ), .VOUT5( VOUT5 ), .VOUT6( VOUT6 ),
.VOUT7( VOUT7 ), .YOUT0( YOUT0 ), .YOUT1( YOUT1 ), .YOUT2( YOUT2 ),
.YOUT3( YOUT3 ), .YOUT4( YOUT4 ), .YOUT5( YOUT5 ), .YOUT6( YOUT6 ),
.YOUT7( YOUT7 )
) ;
// spool event(s)
buf( CLK24DAC_spool, CLK24DAC ) ;
buf( COUT0_spool, COUT0 ) ;
buf( COUT1_spool, COUT1 ) ;
buf( COUT2_spool, COUT2 ) ;
buf( COUT3_spool, COUT3 ) ;
buf( COUT4_spool, COUT4 ) ;
buf( COUT5_spool, COUT5 ) ;
buf( COUT6_spool, COUT6 ) ;
buf( COUT7_spool, COUT7 ) ;
buf( PCSYNCB_spool, PCSYNCB ) ;
buf( PMPAL_O_spool, PMPAL_O ) ;
buf( PTRAPB_O_spool, PTRAPB_O ) ;
buf( VOUT0_spool, VOUT0 ) ;
buf( VOUT1_spool, VOUT1 ) ;
buf( VOUT2_spool, VOUT2 ) ;
buf( VOUT3_spool, VOUT3 ) ;
buf( VOUT4_spool, VOUT4 ) ;
buf( VOUT5_spool, VOUT5 ) ;
buf( VOUT6_spool, VOUT6 ) ;
buf( VOUT7_spool, VOUT7 ) ;
buf( YOUT0_spool, YOUT0 ) ;
buf( YOUT1_spool, YOUT1 ) ;
buf( YOUT2_spool, YOUT2 ) ;
buf( YOUT3_spool, YOUT3 ) ;
buf( YOUT4_spool, YOUT4 ) ;
buf( YOUT5_spool, YOUT5 ) ;
buf( YOUT6_spool, YOUT6 ) ;
buf( YOUT7_spool, YOUT7 ) ;
endmodule
// ---------------------------------------------------------------------
// Pattern Module
// ---------------------------------------------------------------------
`ifdef OPC_pre_V4_2_style_stim
`define OPC_pre_V5_3_style_stim
`endif // for OPC_pre_V4_2_style_stim
`ifdef OPC_pre_V5_3_style_stim
`timescale 10ps / 10ps
`else // !( OPC_pre_V5_3_style_stim )
`timescale 1ps / 1ps // must be a default
`endif // for OPC_pre_V5_3_style_stim
module A5C382CORE_pat(
CLK24DAC_o, COUT0_o, COUT1_o, COUT2_o, COUT3_o, COUT4_o, COUT5_o, COUT6_o,
COUT7_o, PCSYNCB_o, PMPAL_O_o, PTRAPB_O_o, VOUT0_o, VOUT1_o, VOUT2_o,
VOUT3_o, VOUT4_o, VOUT5_o, VOUT6_o, VOUT7_o, YOUT0_o, YOUT1_o, YOUT2_o,
YOUT3_o, YOUT4_o, YOUT5_o, YOUT6_o, YOUT7_o,
PMPAL_I_i, PNTPL_i, PSRGB0_i, PSRGB1_i, PSRGB2_i, PSRGB3_i, PSRGB4_i,
PSRGB5_i, PSRGB6_i, PTCLK_i, PTESTI0_i, PTRAPB_I_i, PTSYNCB_i
) ;
output CLK24DAC_o, COUT0_o, COUT1_o, COUT2_o, COUT3_o, COUT4_o, COUT5_o, COUT6_o,
COUT7_o, PCSYNCB_o, PMPAL_O_o, PTRAPB_O_o, VOUT0_o, VOUT1_o, VOUT2_o, VOUT3_o, VOUT4_o,
VOUT5_o, VOUT6_o, VOUT7_o, YOUT0_o, YOUT1_o, YOUT2_o, YOUT3_o, YOUT4_o, YOUT5_o,
YOUT6_o, YOUT7_o;
output PMPAL_I_i, PNTPL_i, PSRGB0_i, PSRGB1_i, PSRGB2_i, PSRGB3_i, PSRGB4_i, PSRGB5_i,
PSRGB6_i, PTCLK_i, PTESTI0_i, PTRAPB_I_i, PTSYNCB_i;
`ifdef OPC_pre_V4_2_style_stim
reg CLK24DAC_o, COUT0_o, COUT1_o, COUT2_o, COUT3_o, COUT4_o, COUT5_o, COUT6_o, COUT7_o,
PCSYNCB_o, PMPAL_O_o, PTRAPB_O_o, VOUT0_o, VOUT1_o, VOUT2_o, VOUT3_o, VOUT4_o, VOUT5_o,
VOUT6_o, VOUT7_o, YOUT0_o, YOUT1_o, YOUT2_o, YOUT3_o, YOUT4_o, YOUT5_o, YOUT6_o,
YOUT7_o;
reg PMPAL_I_i, PNTPL_i, PSRGB0_i, PSRGB1_i, PSRGB2_i, PSRGB3_i, PSRGB4_i, PSRGB5_i,
PSRGB6_i, PTCLK_i, PTESTI0_i, PTRAPB_I_i, PTSYNCB_i;
`endif // for OPC_pre_V4_2_style_stim
// include stimulus
`include "v15col1_m.stim.v"
`ifdef OPC_pre_V5_3_style_stim
`else // !( OPC_pre_V5_3_style_stim )
`PATTERN_RESO_CHK // trap to check the consistency of pattern file
`endif // for OPC_pre_V5_3_style_stim
`ifdef old_modejudge
`else
initial begin
$display("*===========================================*");
$display(" OPENCAD Testbench Summary");
$display("*===========================================*");
$display("* Stimulus Generator Version : %d",`OPC_ALB2VERI_VER);
$display("* Testbench Generator Version : %d",`OPC_VSH_VER);
$display("*===========================================*\n\n");
end
`endif
endmodule