ewattseldxdy.v 2.45 KB
/**************************************************************************
 *                                                                        *
 *               Copyright (C) 1994, Silicon Graphics, Inc.               *
 *                                                                        *
 *  These coded instructions, statements, and computer programs  contain  *
 *  unpublished  proprietary  information of Silicon Graphics, Inc., and  *
 *  are protected by Federal copyright  law.  They  may not be disclosed  *
 *  to  third  parties  or copied or duplicated in any form, in whole or  *
 *  in part, without the prior written consent of Silicon Graphics, Inc.  *
 *                                                                        *
 *************************************************************************/
// $Id: ewattseldxdy.v,v 1.1 2002/03/28 00:26:13 berndt Exp $
   /////////////////////////////////////////////////////////////////////////
   //
   // Project Reality
   //
   // module:      ewattseldxdy
   // description: selects the correct da/dx and da/dy at appropriate time.
   //   
   //
   // designer:    Mike M. Cai   6/20/94
   //
   /////////////////////////////////////////////////////////////////////////

module ewattseldxdy( dx_att, dy_att,
      	       	     dxr, dxg, dxb, dxa, dxz, dxs, dxt, dxw, //  dxl,
      	       	     dyr, dyg, dyb, dya, dyz, dys, dyt, dyw, // dyl,
		     seldy);
output [22:0]  dx_att, dy_att;
input [22:0]   dxr, dxg, dxb, dxa, dxz, dxs, dxt, dxw, // dxl,
      	       dyr, dyg, dyb, dya, dyz, dys, dyt, dyw; // dyl;
input [3:0]    seldy;  // msb selects dyz
reg [22:0]     dx_att, dy_att;


always @(seldy or dxr or dxg or dxb or dxa or dxz or dxs or dxt or dxw /*or dxl*/)
   case (seldy)
      4'h0: dx_att = dxw;
//      4'h1: dx_att = dxl;
      4'h1: dx_att = 23'h0;
      4'h2: dx_att = dxs;
      4'h3: dx_att = dxt;
      4'h4: dx_att = dxr;
      4'h5: dx_att = dxg;
      4'h6: dx_att = dxb;
      4'h7: dx_att = dxa;
      4'h8: dx_att = dxz;
      default: dx_att = dxz;
   endcase

always @(seldy or dyr or dyg or dyb or dya or dyz or dys or dyt or dyw /*or dyl*/)
   case (seldy)
      4'h0: dy_att = dyw;
//      4'h1: dy_att = dyl;
      4'h1: dy_att = 23'h0;
      4'h2: dy_att = dys;
      4'h3: dy_att = dyt;
      4'h4: dy_att = dyr;
      4'h5: dy_att = dyg;
      4'h6: dy_att = dyb;
      4'h7: dy_att = dya;
      4'h8: dy_att = dyz;
      default: dy_att = dyz;
   endcase

endmodule  //  ewattseldxdy