ewscx.v
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
// $Id: ewscx.v,v 1.1 2002/03/28 00:26:13 berndt Exp $
/////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: ewscx
// description: scissors x coordinate according to scissoring box
// computes x value for span end points.
//
// designer: Mike M. Cai 6/22/94
//
/////////////////////////////////////////////////////////////////////////
module ewscx( x_sc, x_major, x_frac,
x_minor, x_sc_major,
allxlmin, allxgemax,
x_sc_max, x_sc_min,
x_unsc, // x_major use [19:0], other x's use [19:6] and x_sticky
x_sticky,
xval, sel_xval,
scbox_xmax, scbox_xmin,
ld_xmajor,
clear_allxgemax, // clear_allxlemin same as clear_allxgmax
clear_xminor,
y_invalid,
load_cmd, left,
ew_stall_x, reset_l, gclk);
output [12:0] x_sc; // lsb is the sticky bit for rounding up
output [11:0] x_minor, x_sc_major;
output [11:0] x_major;
output [7:0] x_frac;
output allxlmin, allxgemax;
output [11:0] x_sc_max, x_sc_min;
input [19:0] x_unsc;
input x_sticky;
input [3:0] xval;
input sel_xval;
input [11:0] scbox_xmax, scbox_xmin;
input ld_xmajor, clear_allxgemax, clear_xminor;
input y_invalid;
input left, load_cmd;
input ew_stall_x, reset_l, gclk;
// signals for scissoring
reg less_xmin;
reg [14:0] xsc_scmin;
reg allxlmin_m, allxlmin;
reg ge_xmax;
reg [14:0] xsc_scmax;
reg allxgemax_m, allxgemax;
reg [14:0] xsc_m, xsc_mm;
reg [14:0] x_sc_s;
wire [12:0] x_sc;
// signals for for major edge span start x value
reg [19:0] x_major_1d, x_major_2d;
wire [11:0] x_major;
reg [7:0] x_frac_m, x_frac_mm, x_frac;
//signals for computing scissored x_major and x_minor
reg [11:0] x_sc_maxnew, x_sc_max_m, x_sc_max;
reg [11:0] x_sc_minnew, x_sc_min_m, x_sc_min;
// outputs
wire [11:0] x_sc_major, x_minor;
always @(posedge gclk or negedge reset_l)
if (reset_l == 1'h0) begin
x_major_1d <= 20'h0;
allxlmin <= 1'b0;
allxgemax <= 1'b0;
x_sc_s <= 15'b0;
x_frac_m <= 8'b0;
x_frac_mm <= 8'b0;
x_frac <= 8'b0;
end
else begin
// scissor with scbox_min. max(scbox_xmin, x_in)
// taking x[19:6] and x_sticky
if (x_unsc[19] ) begin
less_xmin = 1'b1;
end
else if (x_unsc[18]) begin
less_xmin = 1'b0;
end
else begin
less_xmin = {x_unsc[17:6], x_sticky} < {scbox_xmin,1'h0} ;
end
xsc_scmin = less_xmin ? {2'b0, scbox_xmin, 1'h0} : {x_unsc[19:6], x_sticky};
allxlmin_m = (allxlmin | clear_allxgemax) & less_xmin & ~load_cmd;
// scissor with scbox_xmax. min(scbox_xmax, xsc_scmin)
// scs_scmin is 15 bit {s11.2, sticky}, s is always 0
if ( xsc_scmin[13] ) begin
ge_xmax = 1'b1;
end
else begin
ge_xmax = xsc_scmin[12:0] >= {scbox_xmax, 1'h0} ;
end
xsc_scmax = ge_xmax ? {2'b0, scbox_xmax,1'h0} : xsc_scmin;
allxgemax_m = (allxgemax | clear_allxgemax) & ge_xmax & ~load_cmd;
xsc_m = load_cmd ? {x_unsc[19:6],1'h0} : xsc_scmax;
// xsc_mm = sel_xval ? {11'h0, xval} : xsc_m;
// registers
allxlmin <= ew_stall_x ? allxlmin : allxlmin_m;
allxgemax <= ew_stall_x ? allxgemax : allxgemax_m;
x_sc_s <= ew_stall_x ? x_sc_s : xsc_m;
// get major edge start spen x value
x_major_1d <= ld_xmajor ? x_unsc : x_major_1d;
// x_major_2d <= x_major_1d;
// x_major <= x_major_2d[19:8]; // no fraction is necessary
x_frac_m <= x_major_1d[7:0];
x_frac_mm <= x_frac_m;
x_frac <= x_frac_mm; // 8 bits of fraction
end
assign x_major = x_major_1d[19:8];
assign x_sc = sel_xval ? {11'h0, xval} : x_sc_s[12:0];
// Find the scissored x_max(x_right) and x_min(x_left)
// these values are used in the memory span unit to calculate span address
// find x_sc_max
always @(posedge gclk or negedge reset_l)
if (reset_l == 1'h0)
begin
x_sc_max <= 12'h0;
x_sc_min <= 12'h0;
end
else begin
// Compute x_max with no fraction bits
x_sc_maxnew = x_sc_max & {12{~clear_xminor}};
x_sc_max_m = ((x_sc_s[14:3] >= x_sc_maxnew) & ~y_invalid)
? (x_sc_s[14:3]) : x_sc_maxnew;
x_sc_max <= ew_stall_x ? x_sc_max : x_sc_max_m;
// compute x_min with no fraction bits
x_sc_minnew = x_sc_min | {12{clear_xminor}};
x_sc_min_m = ((x_sc_s[14:3] < x_sc_minnew) & ~y_invalid)
? x_sc_s[14:3] : x_sc_minnew;
x_sc_min <= ew_stall_x ? x_sc_min : x_sc_min_m;
end
assign x_sc_major = left ? x_sc_min : x_sc_max;
assign x_minor = left ? x_sc_max : x_sc_min;
endmodule // ewscx