ms_latch144.v
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/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
*************************************************************************/
// $Id: ms_latch144.v,v 1.1 2002/03/28 00:26:13 berndt Exp $
////////////////////////////////////////////////////////////////////////
//
// Project Reality
//
// module: ms_latch144
// description: Transparent latches: spanbuf output, transp=~clk
//
// designer: Mike M. Cai / Robert W. Sherburne
// date: 12/16/94 revised 1/6/95
//
////////////////////////////////////////////////////////////////////////
module ms_latch144 (d_out, clk, g, d_in);
output [143:0] d_out;
input [143:0] d_in;
input clk, g;
wire [7:0] d0, d1, d2, d3, d4, d5, d6, d7, d8,
d9, da, db, dc, dd, de, df, dg, dh;
wire [7:0] q0, q1, q2, q3, q4, q5, q6, q7, q8,
q9, qa, qb, qc, qd, qe, qf, qg, qh;
wire e0, e1, e2, e3, e4, e5, e6, e7, e8,
e9, ea, eb, ec, ed, ee, ef, eg, eh;
wire gn;
assign {dh, dg, df, de, dd, dc, db, da, d9,
d8, d7, d6, d5, d4, d3, d2, d1, d0} = d_in;
assign d_out = {qh, qg, qf, qe, qd, qc, qb, qa, q9,
q8, q7, q6, q5, q4, q3, q2, q1, q0};
in01d5 in_0(.i(g), .zn(gn));
nr02d2 nr_0(.a1(clk), .a2(gn), .zn(e0));
nr02d2 nr_1(.a1(clk), .a2(gn), .zn(e1));
nr02d2 nr_2(.a1(clk), .a2(gn), .zn(e2));
nr02d2 nr_3(.a1(clk), .a2(gn), .zn(e3));
nr02d2 nr_4(.a1(clk), .a2(gn), .zn(e4));
nr02d2 nr_5(.a1(clk), .a2(gn), .zn(e5));
nr02d2 nr_6(.a1(clk), .a2(gn), .zn(e6));
nr02d2 nr_7(.a1(clk), .a2(gn), .zn(e7));
nr02d2 nr_8(.a1(clk), .a2(gn), .zn(e8));
nr02d2 nr_9(.a1(clk), .a2(gn), .zn(e9));
nr02d2 nr_a(.a1(clk), .a2(gn), .zn(ea));
nr02d2 nr_b(.a1(clk), .a2(gn), .zn(eb));
nr02d2 nr_c(.a1(clk), .a2(gn), .zn(ec));
nr02d2 nr_d(.a1(clk), .a2(gn), .zn(ed));
nr02d2 nr_e(.a1(clk), .a2(gn), .zn(ee));
nr02d2 nr_f(.a1(clk), .a2(gn), .zn(ef));
nr02d2 nr_g(.a1(clk), .a2(gn), .zn(eg));
nr02d2 nr_h(.a1(clk), .a2(gn), .zn(eh));
ms_latch_h #(8) l_0(.e(e0), .d(d0), .q(q0));
ms_latch_h #(8) l_1(.e(e1), .d(d1), .q(q1));
ms_latch_h #(8) l_2(.e(e2), .d(d2), .q(q2));
ms_latch_h #(8) l_3(.e(e3), .d(d3), .q(q3));
ms_latch_h #(8) l_4(.e(e4), .d(d4), .q(q4));
ms_latch_h #(8) l_5(.e(e5), .d(d5), .q(q5));
ms_latch_h #(8) l_6(.e(e6), .d(d6), .q(q6));
ms_latch_h #(8) l_7(.e(e7), .d(d7), .q(q7));
ms_latch_h #(8) l_8(.e(e8), .d(d8), .q(q8));
ms_latch_h #(8) l_9(.e(e9), .d(d9), .q(q9));
ms_latch_h #(8) l_a(.e(ea), .d(da), .q(qa));
ms_latch_h #(8) l_b(.e(eb), .d(db), .q(qb));
ms_latch_h #(8) l_c(.e(ec), .d(dc), .q(qc));
ms_latch_h #(8) l_d(.e(ed), .d(dd), .q(qd));
ms_latch_h #(8) l_e(.e(ee), .d(de), .q(qe));
ms_latch_h #(8) l_f(.e(ef), .d(df), .q(qf));
ms_latch_h #(8) l_g(.e(eg), .d(dg), .q(qg));
ms_latch_h #(8) l_h(.e(eh), .d(dh), .q(qh));
endmodule //