global.scr
1.85 KB
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/* global.scr v1 Frank Berndt
* global constraints, such as clocks, enables, and resets;
*/
current_design = bb
/*
* define all clocks;
* define USBCLK, VCLOCK and DBGCLK to be a multiple of SYSCLK;
*/
create_clock -name SYSCLK -period 9.0 -waveform { 0.0 4.5 } sysclk_tree/N01
create_clock -name MEMCLK -period 4.5 -waveform { 0.0 2.25 } memclk_tree/N01
create_clock -name USBCLK -period 18 -waveform { 0.0 9 } usbclk_tree/N01
create_clock -name VCLOCK -period 18 -waveform { 0.0 9 } vclk_tree/N01
create_clock -name DBGCLK -period 18 -waveform { 0.0 9 } dbgclk_tree/N01
create_clock -name JTAGCLK -period 36 -waveform { 0.0 18 } tck_tree/N01
/*
* set clock uncertainties;
*/
set_clock_skew -uncertainty 0.450 SYSCLK /* TBCTS 250ps + memclk jitter/offset */
set_clock_skew -uncertainty 0.450 MEMCLK /* TBCTS 250ps + 200ps pll jitter + phase offset */
set_clock_skew -uncertainty 0.250 USBCLK /* TBCTS 250ps */
set_clock_skew -uncertainty 0.250 VCLOCK /* TBCTS 250ps */
set_clock_skew -uncertainty 0.250 DBGCLK /* TBBUFCKX32 250ps */
set_clock_skew -uncertainty 0.250 JTAGCLK /* TBBUFCKX32 250ps */
/*
* dont_touch the clock trees and tree drivers;
*/
set_dont_touch_network { SYSCLK USBCLK VCLOCK MEMCLK DBGCLK JTAGCLK }
set_dont_touch sysclk_tree
set_dont_touch memclk_tree
set_dont_touch vclk_tree
set_dont_touch usbclk_tree
set_dont_touch dbgclk_tree
set_dont_touch tck_tree
/*
* set input delays of sysclk path into clock tree;
*/
set_max_delay 5 -from PAD_SYSCLK -to sysclk_tree/H01
/*
* NEC prefers to use set_max_capacitance instead of set_max_fanout;
* below number is a load of 10 * 0.0052pf of TBINVX1;
*/
remove_attribute all_designs() max_fanout
set_max_capacitance 0.052 all_designs()
/*
* dont_touch reset trees and paths;
* must dont_touch_network reset trees to avoid automatic fanout;
*/
set_dont_touch rst_buf1
set_dont_touch { rst_l_in rst_l }