tcfix.lct
1.68 KB
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[Device]
Family = lc4k;
PartNumber = LC4032V-75T48C;
Package = 48TQFP;
PartType = LC4032V;
Speed = -7.5;
Operating_condition = COM;
Status = Production;
Default_Device_IO_Types = LVCMOS18, -;
[Revision]
Parent = lc4k32.lci;
DATE = 10/27/2003;
TIME = 14:59:35;
Source_Format = Schematic_Verilog_HDL;
Synthesis = Exemplar;
[Ignore Assignments]
[Clear Assignments]
[Backannotate Assignments]
[Global Constraints]
[Location Assignments]
layer = OFF;
D0 = Pin, 48, -, A, 4;
CEO = Pin, 24, -, B, 11;
CLE = Pin, 18, 1, -, -;
WE = Pin, 19, 2, -, -;
CEI = Pin, 42, 3, -, -;
RE = Pin, 43, 0, -, -;
[Group Assignments]
layer = OFF;
[Resource Reservations]
layer = OFF;
[Fitter Report Format]
[Power]
[Source Constraint Option]
Import_Source_Constraint = YES;
[Fast Bypass]
Default = None;
[OSM Bypass]
Default = None;
[Input Registers]
Default = None;
[Netlist/Delay Format]
[IO Types]
layer = OFF;
CEI = LVCMOS33, PIN, -, -;
CLE = LVCMOS33, PIN, -, -;
D0 = LVCMOS33, PIN, -, -;
RE = LVCMOS33, PIN, -, -;
WE = LVCMOS33, PIN, -, -;
CEO = LVCMOS33, PIN, -, -;
[Pullup]
Default = Hold;
[Slewrate]
FAST = CEO;
Default = Fast;
[Region]
[Timing Constraints]
[HSI Attributes]
[Input Delay]
[global constraints list]
[Global Constraints Process Update]
[Explorer User Settings]
[LOCATION ASSIGNMENTS LIST]
[RESOURCE RESERVATIONS LIST]
[Pin attributes list]
[Timing Analyzer]
[PLL Assignments]
[Register Powerup]
Default = None;
[Explorer Results]
[Constraint Version]
version = 1.0;
[Node attribute]
layer = OFF;
[SYMBOL/MODULE attribute]
layer = OFF;
[INDIVIDUAL CONSTRAINTS]
layer = OFF;